Anandtech has some early coverage from IDF that goes over what little Intel has released about their new, upcoming core architecture arriving in late 2006. So far the highlights include a much shorter pipeline, shared L2 cache between dual cores and a single architecture between mobile, desktop and server platforms.
You can also catch what Scott at Tech Report has seen on this information, here.
The new architecture will feature a shared L2 cache between the cores, much like what we’ve seen from Yonah already. Intel also said that there would be a higher “relative” increase in L2 cache bandwidth. The new processors will also apparently feature a direct L1-to-L1 cache transfer system in order to improve the currently very poor cache-to-cache transfer performance of Intel’s dual core processors.
There are also a number of new prefetching algorithms, allowing data to be prefetched from L1 to L1 (one core to another), L1 to L2, etc… Intel is also introducing speculative data loads with the new architecture, loads to be executed ahead of stores if a dependency is predicted to not exist between the two. We are waiting for more details on the feature to be exact about its functionality.
