Rev G Rumor Mill
“The extra hardware in between the L2 cache and the data cache is likely an out-of-order L2 read/write buffer that expedites data neeeded for execution. The large bank on the other side of the data cache would be the logical placement for an out-of-order load/store buffer. This prevents cache misses from waiting on Stores to main memory. The extra complex decoder was spotted by a poster on some website. It was the first feature that caught my eye. This shot is definitely not of K-8. Given the layout of the additions, their functions can be inferred.”
Click here for an animation of the comparision.
By superimposing a picture of the new rev G core overtop of the older F core, Brian has discovered that there is more to this processor than just a smaller core.