Programming for Terascale and Final Thoughts

There is no doubt that programming for a terascale processor like this is going to be difficult — we already see this in the move from single core processors, to dual core and now quad core.  A programmer needs to be able to both IDENTIFY parallelism in a problem as well as MANAGE that parallelism so that data integrity is not lost during the application. 

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Intel hopes to be able to enable parallelism in every aspect of both hardware and software, starting with the virtual CPU container, then the OS, the application and even down to individual threads.  With these threads, the terascale processor would need to be intelligent enough to break them down into smaller pieces to distribute to the various cores on the die. 

Intel is actively supporting developers and universities across the world to help them down the right track on multi-threaded programming.  Without it, both Intel’s and AMD’s future plans are useless.

Final Thoughts

Without a doubt the industry is moving into a stage of highly threaded, increased core capacity on their processors and hardware.  While we won’t be seeing an Intel-based 80 core processor for sale any time soon, we will be seeing the Cell processor in the Sony Playstation 3 this year.  Deep down, both the PS3 and the terascale processing initiative that Intel is discussing at IDF are essentially the same ideas with different twists.

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In this graph you can see that by the time we hit 16 cores on a processor, moving on beyond that will not produce any greater performance by simply throwing more cores at the software.  Instead, Intel sees the advantages of terascale processors, such as hardware thread scheduling, cache improvements and new instructions, to complement the increase in cores.  Thus, the user can and enterprise can have a product that produces the best possible performance in nearly any situation. 

During the keynote from Justin Rattner, CTO of Intel, he showed off a sample of a new terascale processor; based on the 80 core design that we have been discussing and theorizing about in this article.

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That’s right, that slide says a Teraflop of performance; on a single chip! 

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Here is a die with 80 of the 80 core processors on them…making for a hefty 6400 core wafer.

At the end of the day, Intel hasn’t jumped any incredible hurdles just yet.  They are devising and planning a stage for their products years down the road but are discussing it with us and the developers to help us all see the advantages of struggling through multi-threaded programming TODAY and not putting it off to tomorrow.

The uses for these chips are impressive to wonder about.  Could it be a high end GPU as Intel has been rumored to be developing?  A counter to AMD’s Torenza platform initiative for task-specific processors?  Or maybe this is why AMD felt the need to buy ATI when it did…remember that the ATI Radeon X1800 and X1900 series GPUs included a lot of scheduling logic for their internal threads.  It is possible that AMD needed a boost on this type of terascale processing and it could get that from ATI rather quickly.  There are lot of ideas swirling around IDF, but nothing is concrete yet, and probably won’t be for quite some time. 

The terascale project is one that many have theorized would be the future of processing and computing; Intel is readying their cards for such a shift.

Update: Some people have stated that this processor is not “x86 compatible” and thus would be useless.  While the first gen processor that they physically showed us during the keynote is not x86-compatible, because the cores are simply basic floating point units, future terascale processors very well CAN be x86-compatible and will likely be so!

If you are interested in more information from Intel on the Terascale technology, check out the website they have set up for it.  Look for the “View Flash Demo” link on the right hand side.

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