You can also find out what Ryan has discovered right here.
“The Tera-scale processor is an array of 80 “tiles” each containing a processing engine made up of a five-port router, two independent fully-pipelined single-precision floating-point multiply-accumulator (FPMAC) units, 3KB of single-cycle instruction memory, and 2KB of data memory. The two FPMACs are based on a Very Long Instruction Word-type design, much like Intel’s Itanium. They have nine-stage pipelines and are able to provide an aggregate 16 gigaFLOPS of performance. And thanks to the five-port router, each “tile” can communicate with other tiles at up to 80GB/s.”
Here are some more Processor articles from around the web:
- Intel 80 core chip revealed in full detail @ The Inquirer
- The Era of Tera: Intel Reveals more about 80-core CPU @ AnandTech
- Intel shows off 80-core processor @ CNET
- Desktop CPU Comparison Guide Rev. 3.2 @ TechARP
- Experiences with Core 2 Duo E6300 @ Tech-Hounds