“Intel’s development model and cadence is a predictive, efficient and effective way to deliver products and provide the industry with an exciting computing roadmap in our relentless pursuit of Moore’s Law,” said Patrick Gelsinger, senior vice president and general manager of Intel’s Digital Enterprise Group, at the Intel Developer Forum in San Francisco. “In addition to our processors, we’re focused on delivering energy efficiency via design of better, Hafnium-based High-k transistors as well as enhancements in overall system level architecture to minimize the computer’s energy usage.”
During his speech, Gelsinger showed the first-ever Intel 45nm High-k metal gate next-generation microarchitecture (Nehalem) dual processor server that uses the element Hafnium instead of silicon in portions of the 700 million-plus transistors inside the processor die, which is about the size of a postage stamp. Nehalem is the codename of a new processor microarchitecture arriving in 2008 that will provide up to three times the peak memory bandwidth of current competing processors. He also showed broad industry support for the Intel® QuickPath Architecture. The QuickPath Interconnect provides high-speed data paths to Nehalem’s processor cores.