In the third instalment of their series on the architecture of Nehalem, AnandTech explores the cache size, specifically the itsy-bitsy L2 cache.  There is a big trade off in size and latency, much like in any other part and any way to cut latency inside the processor it’s self will give some nice returns.  They also talk to Intel about the next process, 32nm so head over for bit of prognostication about the near future.
“In an unexpected turn of events I found myself deep in conversation with many Intel engineers as well as Pat Gelsinger himself about the design choices made in Nehalem. At the same time, Intel just released its 2009 roadmap which outlined some of the lesser known details of the mainstream LGA-1156 Nehalem derivatives.

I hadn’t planned on my next Nehalem update being about caches and mainstream parts, but here we go. For further reading I’d suggest our first two Nehalem articles and the original Nehalem architecture piece.”

Here are some more Processor articles from around the web:


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