48-cores ahoy!
Intel announced a new processor design codenamed Bangalore that combines 48 x86 IA cores onto a single massive chip. The CPU will aimed at the future of cloud computing and could enable entirely new server and software designs. This is the progression of the original 80-core design we saw in 2006 – but we are getting much closer to reality here now.
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First, many of you will likely remember the original “Tera-scale” project that we reported on back in 2006 – at the time it included 80 cores on a single processor but was really just a technology showcase and a proof of concept.
That project and today’s differ on quite a few levels. First, the “SCC” is much closer to a realized product as Intel has started looking into markets that will benefit from this type of computing power. Also, the architecture and design of the cores on the SCC are fully functional x86 IA cores where as on the original 80-core test chip we were simply looking at floating point processors.
The new SCC has also been tweaked for efficiency and can run with as little power as 25 watts!
The 48 cores are arranged in 24 “tiles” – what you can think of as 24 separate dual-core processors. These tiles are then connected via a 2D mesh network that can support up to 256 GB/s of bandwidth! There are four integrated DDR3 memory controllers (though no mention of how many channels each controller is) that can house as much as 64GB of total memory.
Things get interesting here – Intel is saying that they have removed hardware cache coherency which effectively means each “tile” will be completely separate in what it stores in local L2 cache. All cache communication between cores and tiles will thus be handled by the mesh data communication system and the dedicated “message buffer” on each tile.
Power efficiency is very important when it comes to server environments so Intel has made some impressive steps there. Each processor will have 8 different voltage “islands” and 28 different frequency “islands” – this means that each tile can run at its own frequency while each collection of four tiles will run at a different voltage. This should potentially allow the CPU power consumption to scale with compute very well.
The processor die itself measures at 567 mm^2 – compare that to the newest Intel Lynnfield parts that measure 296 mm^2! This is a massive part to be certain but you would expect as much with 48 even basic x86 IA cores.
What uses could Intel find for a processor like this? Intel points to segments like financial analytics, physics modeling, HPC parallel workloads, complex web searching and more. Here are a few quotes from potential SCC users:
“We’re very excited about Intel’s Single-chip Cloud Computer. In the Barrelfish project we are designing OS architectures for future multicore and manycore systems. The chip’s memory system and message passing support are a great fit for us, and it’s an ideal vehicle for us to test and validate our ideas.” – Prof. Timothy Roscoe, ETH Zurich
“The Single-chip Cloud Computer is an exciting platform for datacenter research because the combination of fine-grained voltage and frequency control, together with the ability to shut off entire zones of the processor, means that we can accurately investigate the balance between computation, memory, and I/O. The chip’s massive parallelism gives us the ability to investigate, today, the degree of parallelism that will be needed from applications five years down the line to make the best use of emerging many-core platforms.” – David Andersen, assistant professor of Computer Science at Carnegie Mellon University
“The upcoming Single-chip Cloud Computer is of great interested to application developers and tools researchers. The availability of the hardware will greatly accelerate our development of applications and tools for massively parallel computing platforms.” – Prof. Wen-Mei Hwu, University of Illinois, UPCRC@Illinois co-director
“Microsoft is partnering with Intel to explore new hardware and software architectures supporting next-generation client plus cloud applications,” said Dan Reed, Microsoft’s corporate vice president of Extreme Computing. “Our early research with the single chip cloud computer prototype has already identified many opportunities in intelligent resource management, system software design, programming models and tools, and future application scenarios.”
Further Reading:
- IDF 2006: Terascale Processing Brings 80 Cores to your Desktop
- Intel’s 80 Core Terascale Chip Explored: 4GHz clocks and more
- IDF Fall 2007: Terascale Computing Updates and more
- Intel Research Chip Advances ‘Era Of Tera’
- Intel Develops Tera-Scale Research Chips
Finally, here is the full press release from Intel below.
The long-term research goal is to add incredible scaling features to future computers that spur entirely new software applications and human-machine interfaces. The company plans to engage industry and academia next year by sharing 100 or more of these experimental chips for hands-on research in developing new software applications and programming models.
While Intel will integrate key features in a new line of Core-branded chips early next year and introduce six- and eight-core processors later in 2010, this prototype contains 48 fully programmable Intel processing cores, the most ever on a single silicon chip. It also includes a high-speed on-chip network for sharing information along with newly invented power management techniques that allow all 48 cores to operate extremely energy efficiently at as little as 25 watts, or at 125 watts when running at maximum performance (about as much as today’s Intel processors and just two standard household light bulbs).
Intel plans to gain a better understanding of how to schedule and coordinate the many cores of this experimental chip for its future mainstream chips. For example, future laptops with processing capability of this magnitude could have “vision” in the same way a human can see objects and motion as it happens and with high accuracy.
Imagine, for example, someday interacting with a computer for a virtual dance lesson or on-line shopping that uses a future laptop’s 3-D camera and display to show you a “mirror” of yourself wearing the clothes you are interested in. Twirl and turn and watch how the fabric drapes and how the color complements your skin tone.
This kind of interaction could eliminate the need of keyboards, remote controls or joysticks for gaming. Some researchers believe computers may even be able to read brain waves, so simply thinking about a command, such as dictating words, would happen without speaking.
Intel Labs has nicknamed this test chip a “single-chip cloud computer” because it resembles the organization of datacenters used to create a “cloud” of computing resources over the Internet, a notion of delivering such services as online banking, social networking and online stores to millions of users.
Cloud datacenters are comprised of tens to thousands of computers connected by a physically cabled network, distributing large tasks and massive datasets in parallel. Intel’s new experimental research chip uses a similar approach, yet all the computers and networks are integrated on a single piece of Intel 45nm, high-k metal-gate silicon about the size of a postage stamp, dramatically reducing the amount of physical computers needed to create a cloud datacenter.
“With a chip like this, you could imagine a cloud datacenter of the future which will be an order of magnitude more energy efficient than what exists today, saving significant resources on space and power costs,” said Justin Rattner, head of Intel Labs and Intel’s Chief Technology Officer. “Over time, I expect these advanced concepts to find their way into mainstream devices, just as advanced automotive technology such as electronic engine control, air bags and anti-lock braking eventually found their way into all cars.”
