Die Shrinks and You!
Here is a brief progression starting from the early days of flash:
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From left: 130nm (128MB) in 2003, 90nm (512MB) in 2005, 50nm (1GB) in 2007,
34nm (4GB) in 2009, and finally 25nm (8GB) flash now being produced at IMFT.
To the far right is the now standard flash memory TSOP packaging.

Some of you might be scratching your heads wondering why these numbers seem on the low side.  We’ve cracked open 34nm samples of Intel X25-M 80GB SSD’s with only 10 chips, and even newer 160GB models with that same chip count, meaning 16GB per chip.  To properly understand this you need to replace ‘chip’ with TSOP.  A Thin small-outline package is the form factor of what we’re used to seeing on Intel and now Micron SSD’s.  The 80 and 160GB drives from Intel are using multiple dies stacked within each TSOP – in this case 2 each for the 80GB and 4 each for the 160GB.

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The X25-M G2 employs TSOP’s with internal stacks of 4 4GB 34nm dies.
10 of the packaged chips add up to the 160GB model we see here.

It takes a little getting used to this, as we normally see a single die in the form of what’s under the Integrated Heat Spreader of a CPU.  With flash it makes more sense to go vertical and squeeze more capacity out of a given package.  The highest practical stacking at present is 4 dies per TSOP, meaning we are likely to see these new 25nm parts mass produced in up to 32GB-per-package capacities.  It’s possible to stack higher, as Intel did with the (very) pricey first generation X25-M 160GB.  Some manufacturers take stacking to the extreme but can only do so in very small / experimental volumes:

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This prototype Toshiba flash part has 16 (!) layers of 32 Gbit 34nm flash, adding up to a whopping 64GB in a single package.

Because of the need to fit flash memory into a standard package size, you won’t see the same large variations in die size as with CPU’s and GPU’s.

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Huge die sizes are employed by some of the higher end GPU’s out there,
as is the case with the RV830 GPU pictured above.

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To counter Ryan’s ‘gigahugic’ die shot, I submit my own modest penny shot of the 25nm die.
The smaller die footprint is required to fit standard TSOP packaging.
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