Just as Intel is slowly persuading its super fast data interconnect, the PCI Special Interest Group is already introducing their own competing standard in the form of a PCI Express cable that is slated to be capable of a drool-worthy 32Gbps (gigabits per second). Planned to be constructed from copper wire, the cable standard will be launched as part of the PCI Express 3.0 standard and will be able to pipe both data and power through a thin, flattened cable up to 3 meters (9.84 feet) in length.
The PCIe cable is able to achieve this high bandwidth by combining up to four parallel lanes, each capable of 8 Gigatransfers per second (GT/s). Further, it will be able to provide approximately 20 watts of maximum power to peripheral devices. Speedy connectivity to fast SSD based portable hard drives as well as to tablet and smart phone devices for sync, additional touch interface, and external displays are all aims of the PCIe cable. It is squarely aimed to compete with Intel-backed Thunderbolt; however, the PCI SIG has not stated as such, yet. The interest group was quoted by EE Times in saying "There are solutions [like this] in the industry–Thunderbolt is one of them, and some companies are doing own thing,"
Intel’s Thunderbolt and the PCIe cable will soon enter the Thunderdome to battle for supremacy
The PCIe cable is expected to be ready for peripheral device makers’ integration as early as June 2013. In the future, the cable is likely to be included in the PCI Express 4.0 standard where it will receive an upgrade to 16 GT/s lanes, and from their it will subsequently receive an upgrade to an optical based transmission material.
You can read more about the new PCI Express cable as well as its merits as a open standard (and how that affects Thunderbolt’s proprietary nature) over at EE Times.
Nice to see an improvement of
Nice to see an improvement of transfer speeds but one standard should be it and others to follow. Everyone wants their piece of the pie.
Oh, external video cards.
Oh, external video cards.
I’m not sure this
I’m not sure this announcement changes in anything in regards to external graphics. The bottlenecks are the bandwidth really, it is is more an issue of industry standard connectors and the real push for consumers to demand them.
We have seen working examples of these for YEARS but they never turn into a popular product.
If I could let my mind wander
If I could let my mind wander away from strictly market-oriented considerations for a moment, here’s what I think:
Look closely at some of the internal block diagrams for the latest SandForce controllers: 8- and 16-channels!
The PCI-Express standard was developed to facilitate scaling from x1 to x16 lanes; then, the speed of each lane was increased.
As of PCI-E 3.0, the speed of each lane will be increased again, this time to 8G.
Moreover, the 8b/10b protocol will finally be replaced with a much more efficient 128b/130b “jumbo frame”.
This means that we divide 8G / 8 bits per byte to get an even 1 GB/second raw bandwidth per lane in each direction, instead of dividing 8G / 10 bits per byte.
Thus, an x16 PCI-E 3.0 edge connector should be capable of a raw bandwidth of 16GB/sec in each direction.
Now, this will surely make chipsets function much more efficiently at the bus level. But, what happens when all that I/O must reach out beyond the confines of a motherboard, to storage subsystems and other peripherals?
If the SATA standard is not changed again to accommodate this higher aggregate bandwidth, SATA devices will be stuck at 600 MB/second — probably for a long time, if past rates of implementation are a good predictor (6G/10=600).
And, current SATA/6G SSDs are already close to saturating the 600 MB/sec bandwidth ceiling of that standard.
At the very least, the SATA standard needs to be modified again to accommodate 8G transmission rates, and the SATA protocol needs to “synchronize” with the PCI-E 3.0 protocol using the same 128b/130b jumbo frame (abbreviated 130/128).
Let’s call this the “SATA-IV” standard specification.
As I read the PCI-E SIG’s stated intentions, they want to bundle 4 such 8G channels into a single cable, and also specify a connector at both ends of that cable which can be adopted as an industry-wide standard.
This kind of thing is already happening with multi-lane “Infiniband” cables, which bundle 4 x SATA/3G channels for connecting external enclosures housing multiple SATA drives.
So, an open standard that effectively extends the raw chipset bandwidth of PCI-E 3.0 motherboards out to all compatible peripherals, is an excellent idea, imho.
It also allows for simple changes to be made to existing PCI-E add-on cards that exploit the higher transmission rates to and from the peripherals, while maintaining backwards compatibility with PCI-E 2.0 expansion slots.
The real strength of PCI-Express is that the upstream bandwidth can be “carved up” any number of ways e.g. an x8 PCI-E 2.0 RAID controller like the Highpoint RocketRAID 2720SGL is already capable of 4.0 GB/second upstream.
I hope this helps.