One of the many interesting bits of information AMD disseminated at this years FAD started some conjecture about possible problems with Piledriver. It seems that somewhere along the line AMD dropped a module on the Seou chip bringing its core count down from 10 to 8. Once the hue and cry died down a bit a theory propounded by SemiAccurate offered a sensible theory for the change. It seems likely that AMD initially developed this family of chips with the belief that DDR4 would have made it to market by now, perhaps in compensation for the delay in adopting DDR3. Unfortunately DDR4 is nowhere to be seen outside of testing laboratories which has had an effect on AMD’s development plans. Without new memory there is no extra memory bandwidth which will in turn starve the extra cores on the chip and likely slow the performance of all of the cores. Instead AMD opted to trim out the extra cores and as a benefit they get to utilize their existing sockets as opposed to introducing another one.
"A lot of people are in a tizzy because AMD (NYSE:AMD) has changed the upcoming Seoul CPU from 10 to 8 cores. The general responses ranges from AMD incompetence to apocalypse, but all it really signals is a lack of technical understanding on their behalf.
The slide in question was the server roadmap we wrote up here. It introduces Piledriver cored Abu Dhabi and Seoul chips, successors to the Bulldozer based Interlagos and Valencia respectively. The base part has 4 modules/8 cores, and the bigger variant is two of those in a package. The big controversy is that they were supposed to be 5 module/10 core parts."
Here is some more Tech News from around the web:
- Micron appoints a new CEO @ The Inquirer
- DIY Windows 8 Tablet @ Hack a Day
- The TR Podcast 105: Eye candy and SSD scaling
- Scott Luminor Sound and Light Wireless System (i-DXS 10 L Luminor) @ Tweaktown
- Timeline: Eight Years of Facebook Features, Feats and Flops @ TechReviewSource
- Win two fully-loaded Intel Ivy Bridge powered PCs @ Kitguru