If you are not familiar with JEDEC you might not realize why they are constantly referred to when news breaks about a new technology; if that is the case you should aquaint yourself with them. The standard for DDR4 is almost finalized with the specific changes being that the DIMM’s VDDQ must remain constant at1.2V with plans to reduce VDD and speeds of 1.6 giga transfers per second to an initial objective of 3.2 giga transfers per second. This seems low considering DDR3-2400 can hit 2.4GT/s so when it arrives we may see speeds cross over like DDR2 did when we saw DDR3 first come onto the stage.
Micron has fabbed 30nm DDR4 chips, both DIMM and SODIMM varieties which operate at the lower voltage. The initial speed of 4Gbit/s that The Inquirer reports on may seem conservative but for this initial run we are only looking for a proof of concept which can be refined. Micron expects to see production swing into gear by the end of 2012 but they may not have many customers as neither AMD nor Intel have DDR4 support scheduled by that time.
"Although JEDEC has yet to finalise the DDR4 specification, Nanya and Micron have been forging ahead designing and now fabricating 30nm 4Gbit DDR4 chips that will be part of the two firms’ DDR4 product range that will include registered and low-voltage registered DIMMs and SODIMMs. According to Micron, it is already sampling DDR4 modules and expects its customers to support quick implementation in 2013."
Here is some more Tech News from around the web:
- Attackers target unpatched PHP bug allowing malicious code execution @ Ars Technica
- AMD G series APUs support Windows Embedded Compact 7 @ The Inquirer
- AMD readies Trinity APU in May and preparing more CPUs for later @ DigiTimes
- Ninjalane Podcast – Diablo 3 and Game Demos What is Kickstarter and Prepping for MOA
- A bit about the diode @ Hack a Day
Will these change anything
Will these change anything for PC? I’m under the impression that large DDR3 memory bandwidth gains translate to marginal performance gains. But perhaps that is just a design limitation of the CPU?