The Xeon Phi is not Larrabee but it does give a chance to remind people that Intel did at one time swear we would be seeing huge results from a lot of strung together Pentium chips. Nor is Many Integrated Cores the same as AMD's Magny-cours, although you can be forgiven if that thought popped into your head. Instead the Xeon Phi is a co-processor that will have 50 or more 512-bit SIMD architecture based processors, each with 512KB of Level 2 cache. These cores are comparatively slow on their own but have been designed to spread tasks over dozens of cores for parallel processing to make up for the lack of individual power. Intel sees Phi as a way to create HPC servers which will be physically smaller than one based solely on traditional Xeon based servers as well as being more efficient. There is still a lot more we need to learn about these chips; until then you can check out The Inquirer's article on Intel's answer to NVIDIA and AMD's HPC cards.
"CHIPMAKER Intel revealed some architectural details of its upcoming Xeon Phi accelerator at the Hotchips conference, saying that the chip will feature 512-bit SIMD units."
Here is some more Tech News from around the web:
- IFA: Asus Taichi notebook tablet video demo @ The Inquirer
- TSMC to see revenues decline in August-September @ DigiTimes
- Microsoft fails to pacify PC vendors about Surface table @ DigiTimes
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- Guru3D Rig of the Month – August 2012
- AMD Pushes Steamroller and Excavator Forward, Bullish about Performance Increases @ VR-Zone
- Applied Micro's X-Gene server chip ARMed to the teeth @ The Register
- Camera Lens Buying Guide @ TechARP
- Win a Fractal Design Define R4 Case for Free! @ Hardware Secrets