AMD, in cooperation with Aricent and Mentor Graphics, recently demonstrated the first ARM-based Network Functions Virtualization (NFV) solution at ARM TechCon. The demonstration employed AMD's Embedded R-Series "Hierofalcon" SoC virtualizing a Mobile Packet Core running subscriber calls. The 64-bit ARM chip is now sampling to customers and will be generally available in the first half of next year (1H 2015). The AMD NFV Reference Solution is aimed at telecoms for use in communications network backbones where AMD believes an ARM solution will offer reduced costs (both initial and operational) and increased network bandwidth.
The NFV demonstration of the Mobile Packet Core entailed virtualizing a Packet Data Network Gateway, Serving Gateway, Mobility Management Entity, and virtualized Wireless Evolved Packet Core (vEPC) applications. AMD further demonstrated live traffic migration between ARM-based Embedded-R and x86-based second generation R-Series APU solutions. NFV is related to, but independent of, software defined networking (SDN). Network Functions Virtualization is essentially the virtualizing of network appliances with specific functions and performing those functions virtually using generic servers. For example, NFV can virtualize firewalls, gateways, load balancers, intrusion detection, DNS, NAT, and caching functions. NFV virtualizes the upper networking layers (layers 4-7) and can allow virtual tunnels through a network that can then be assigned functions (such as those listed above) on a per-VM or per flow basis. NFV eliminates the need for specialized hardware appliances by virtualizing these functions on generic servers which have traditionally been exclusively x86 based. AMD is hoping to push ARM (and it's own ARM-based SoCs) into this market by touting even further capital expenditure and operational costs versus x86 (and, in turn, versus specialized hardware that serves the entire network whereas NFV can be more exactly provisioned).
It is an interesting take on a lucrative networking market which is dealing with 1.4 Zetabytes of global IP traffic per year. I'm interested to see if the telecoms and other enterprise network customers will bite and give AMD a slice of this pie on the low end and low power fronts.
AMD "Hierofalcon" Embedded R Series SoC
Hierofalcon is the code name for AMD's 64-bit SoC with ARM CPU cores intended for the embedded market. The SoC is a 15W to 30W chip featuring up to eight ARM Cortex-A57 CPU cores capable of hitting 2GHz, two 64-bit ECC capable DDR3 or DDR4 memory channels, 10Gb Ethernet, PCI-E 3.0, ARM TrustZone, and a cryptographic security co-processor.The TechCon demonstration was also used to launch the AMD NFV Reference Solution which is compliant with OpenDataPlane platform. The reference platform includes a networking software stack from Aricent and an Embedded Linux OS and software tools (Sourcery CodeBench) from Mentor Graphics. The OpenDataPlane demonstration featured the above mentioned Evolved Packet Core application on the Hierofalcon 64-bit ARM SoC. Additionally, the x86-based R-Series APU, OpenStack, and Data Plane Development Kit all make up the company's NFV reference solution.
There are, and will be many
There are, and will be many others developing ARM based solutions, for the telecoms, some of them with 32 cores. for sure ARM ISA based chips will be used, as there are no readily available x86 licenses, and as far as running cell towers, power usage is an important consideration, along with the cost of the x86 based server SKUs, so why not go all with an ARM ISA based RISC microarchitecture, some telecoms could potentially have ARM chips made to their exact system/ecosystem specifications, and the ARM ISA based designs could have custom hardware instructions baked into the silicon tailored to virtualize the server/telecom loads, customizations that are not possible for the x86 what you see is what you get SKUs from a limited amount of suppliers.
AMD does have one advantage on the server side, once the Sky-bridge motherboards and ecosystem becomes available, in that the server motherboard’s will be able to host both x86, and ARM based SOCs/CPUs, so any legacy code ecosystems can be easily migrated from AMD x86 to AMD ARM based, with just the swapping of a chip.
AMD needs to realize, though, that a power8 license may be a wise decision also, before the Chinese chip makers begin to enter the market, along with Samsung, Fujitsu, and others, Power8 is a RISC design with SMT(variable SMT up to 8 threads) so it’s always good to develop for more than just x86 and ARM, the competition is going to be heavy, starting in 2015 between MIPS, ARM, Power8, and x86, from the server room down to the smart watch, and IOT devices(do not exclude the MIPS ISA in IOT devices).
Nvidia is not standing still with its desire to enter even more the SOC market, as well as other SOC/CPU markets, with custom ARM, and maybe other ISA based solutions. AMD does need to get a custom ARMv8 ISA based wider order core out there, or Apple, and Nvidia will have the majority of the ARM based tablet market, leaving AMD struggling for a share.
You take the time to write
You take the time to write interesting and in depth comments. Why don’t you put a handle to it so we know when it is you and not some other anonymous?
He really doesn’t need to,
He really doesn’t need to, his love for POWER8 could hardly be contained for the first two paragraphs, and is quite a unique identifier as is.
or her, could be a her
or her, could be a her
No love for any particular
No love for any particular ISA/IP, but do go read the Hot Chips symposium’s white papers and presentations on the Power8 microarchitecture, it’s RISC based like ARM, and the microarchitecture already supports STM(Simultaneous multithreading). So Power8, MIPS, and ARM, are good RISC based choices, and demonstrate the wide variety of uses that a RISC based microarchitecture can achieve. From Apples A7/A8 to Nvidia’s Denver K1, all the way up to the server HPC/supercomputer market. And the part that I like the best, is that these designs are licensable and any company with the in house knowhow can license the IP/ISA and roll their own, and not be at the mercy of a single supplier. Just read up on the Power8, and read the server based benchmarks, on the professional servers technology websites, the ones that cater to the server market, and see how the power8 performs relative to the Xeon, and Know that Apple, Nvidia, AMD, and others have the In House engineering talent to make use of the Power8 IP, and reference design, to derive as many different SKUs, across the whole range my CPU/SOC markets. Apple’s P.A. semiconductor folks, did a great job taking the ARMv8 ISA, and Only the ISA, and taping out a much better chip, than the Arm Holdings reference design, same for Nvidia’s Denver K1 variant! So I also like the Custom designs that just take the ARMv8 ISA and make a better microarchitecture to run the ISA. The Power8 is such a powerful RISC design, that the reference power8 hardly needs any improving, and is a RISC design that already HAS SMT, so no extra engineering needed to derive the reference design into a whole range of SKUs that will be as powerful as any x86 based designs. So when a new microprocessor microarchitecture comes up for licensing, by a whole industry, Just like the ARM microarchitecture is now, it’s a big deal, so I like MIPS, ARM, Power8, Epiphany, etc. and x86 is not the only game in town. Say hello to the Licensed IP market, a market that will eventually come to dominate the entire CPU/SOC world.
You hate a microarchitecture, and what you fear the most is competition, you do not have to like Power8, or IBM, but once the Power8/power IP was released as licensable IP, it can have a life of its own, outside of IBM’s total control, just look at the ARM based industry , and know that the same thing is in store for the PC, Laptop, and server market, and those old monolithic monopolies are an endangered species, soon to become extinct!
P.S. Arm Holdings better begin a redesign of its reference design CPU microarchitecture, least Apple’s P.A. Simi folks, get their hands on a power8 license, its time for ARM holdings to get some SMT into its offerings, or face some stiff competition from any future Power8 derivatives, Modern CPU microarchitectures are modular by nature, just as much as GPU microarchitectures, and can be sliced down to many different SKUs over a wide range of products.
(on Line 3)
Edit; STM
to:
(on Line 3)
Edit; STM
to: SMT
damn transposition errors.
Why put a handle on it, it’s
Why put a handle on it, it’s not about the individual, it’s about the technology! Technology is not a sporting event, even though there is competition, it is competition of a different sort, and not based on the fanboy’s specious tautologies. There is really very little understanding of technology and computer science, in the Tech. market, so dominated by snake oil salesman, and their modern day equivalent, the marketing “profession”. If you want a proper view of all things technology, simply go to the professional trade journals of the computer sciences, and engineering world. High technology is not a simple matter, epically when it comes to CPUs/SOCs, where any mention of the CPU/SOC in the popular press is quickly degraded into a discussion of the final devices’ consumer features, and no real analysis of the CPU’s/SOC’s inner workings, the so called technology websites, are anything but about technology, and more about marketing, the kind of marketing that wants to block knowledge, in order to make the consumer as uninformed as possible, to foist a load of goods, at a profit. Good luck getting any subjective materials online, outside of a pay wall, but the good old community college, or full university libraries are a great source of correct information.