Intel's new entry into the low powered server chip market will be called the Xeon D and will be 14-nm process with tri-gate transistors and a TDP ranging from ~25-45W. The chip will use Broadwell cores with 64K of combined L1 cache and 256K of L2 per core as well as 1.5MB of a shared pool of 12MB of L3 cache, aka last level cache. The chip itself will have 24 lanes of Gen3 PCIe as well as a pair of 10Gbps NICs and the I/O controller that shares space on the chip will add six SATA3 ports, another eight lanes of PCIe Gen2, and USB support. The Tech Report only had frequencies for two chips, the 8 core Xeon D-1450 has a base clock of 2GHz, an all-core Turbo peak of 2.5GHz, and a single-core Turbo peak of 2.6GHz while the Xeon D-1520 hits 2.2GHz base frequency, 2.5GHz all-core Turbo, and a 2.6GHz single-core peak. Check out more in the full review here.
"The Xeon D is Intel's pre-emptive strike against upcoming ARM-based competition in the server market. Built on 14-nm process tech and fortified with Broadwell cores, this single-node processor looks like the future of the Xeon lineup."
Here is some more Tech News from around the web:
Once again for sure the TR
Once again for sure the TR website, and posters is going all in with this Intel product being a ARM based server killer, but fail to mention that avoiding the vendor lockin is a big reason for customers looking for more than a single server SKU/ISA choice, that and other considerations! The Intel evangelists out there are Touting TSX, transactional memory instructions, but the other competing products Power8, and ARM based, both support Transactional memory instructions under their respective branding. I do not expect too many subjective comparisons and contrasts between the competing Intel based SKU/s verses the many ARM based server SKUs pending/shipping from many ARM/other based suppliers, and also including the Power8 openpower power8 SKUs from many licensees, from the enthusiasts websites that rarely mention all of Intel’s competition. It’s best to take any enthusiasts’ websites reviews in the server space market/benchmark analysis with a grain of salt, and refer to the professional enterprise server/HPC websites that specialize in a more subjective, and comprehensive reviews on the subject.
For sure, Intel needs to respond, and continue to try and compete to maintain market share, but there will be ARM, and Power8, based products, and maybe even MIPS based server/micro-server based products coming online, and AMD is a little behind the curve, but AMD has a very interesting innovation going on server wise, with Skybridge and the dual use motherboards that are socket/pin compatible between x86, and ARM, ISA based AMD CPUs/APUs. Yes AMD is currently using/developing reference design ARMv8A ISA based server SKUs, but AMD will also be developing a custom microarchitecture ARMv8A ISA based CPU/APU K12 core, for future ARM based server SKUs. AMD’s ZEN x86 based server products are expected also, in 2016. It’s not currently Known what the AMD’s custom ARMv8 ISA microarchitecture will bring to the market, but AMD has some experience with using GPU style design libraries and applying them to the x86 layouts with Carrizo APUs, so that IP may also be applicable to any ARM based AMD APUs in the future to get a denser circuit packing out of any process node, for greater server density in the micro-server/server market. AMD’s innovation pace continues, and it is too early to totally count them out, as many have tried to claim over more than one decade’s time.
Intel is the incumbent in the server area, but like the mobile market it will have compete against RISC designs, and the RISC design’s inherent power efficacies, even on a larger process node compared to CISC designs. The server workloads that do not need the heavy analytical abilities of the standard Xeon based SKUs will be where ARM/others make their beachhead, Intel has another battle front altogether in the impending battle with the licensed Power8 beasts just beginning to become available, for those high powered analytical server workloads.