To keep it interesting and to drive tech reviewers even crazier, Intel has changed their naming scheme again, with C now designating an unlocked CPU as opposed to K on the new Broadwell models. Compared to the previous 4770K, the TPD is down to 65W from 84W, the L3 cache has shrunk from 8MB to 6MB and the frequency of both the base and turbo clocks have dropped 200MHz. It does have the Iris Pro 6200 graphics core, finally available on an LGA chip. Modders Inc. took the opportunity to clock both the flagship Haswell and Broadwell chips to 4GHz to do a clock for clock comparison of the architectures. Check out the review right here.
"While it is important to recognize one's strengths and leverage it as an asset, accepting shortcomings and working on them is equally as important for the whole is greater than the sum of its parts."
Here are some more Processor articles from around the web:
- Intel Celeron N3050 Braswell Linux Performance @ Phoronix
- Intel Core i7-5775C @ Legion Hardware
- AMD vs. Intel Price Comparison Table – July/2015 @ Hardware Secrets
- Comparing Today's Modern CPUs To Intel's Socket 478 Celeron & Pentium 4 NetBurst CPUs @ Phoronix
- AMD A10-7870K Godavari: RadeonSI Gallium3D vs. Catalyst Linux Drivers @ Phoronix
- AMD A10-7870K Benchmarks On Ubuntu Linux @ Phoronix
it great that intel is making
it great that intel is making their graphics on their cpu more powerful but people who are buying intel wont be using the intergrated graphics, im scratching my head on who has enough money to buy this 300+ cpu but wont spend 200 on a better graphics card that can outperform the gpu side of this cpu buy a stupid amount.
Home theater PCs and other
Home theater PCs and other ultra small form factor builds.
I would argue that an APU is
I would argue that an APU is still a better option for those two form factors, simply due to price/performance.
Until there’s a common method
Until there’s a common method to integrate the power of that eDRAM and IGP into everyday computing tasks, it does seem like a total waste for desktop use with one exception.
If the only draw is the 3D capabilities of Iris Pro, then the only application that makes sense is NUC-sized devices. Any desktop large enough to accommodate even a low-profile dGPU will be leaps and bounds beyond this.
Likewise, if you don’t need the 3D power, then any other Intel CPU will work just fine for home theater/decode activities.
HTPCs do include gaming on
HTPCs do include gaming on emulators.
Even a modern Atom can run
Even a modern Atom can run Dolphin emulation just fine unless you’re rendering it at 1080p with 8xAA, etc.
https://youtu.be/dVtdgVNN1RQ
“Compared to the previous
“Compared to the previous 4770K, the TPD” should be replaced with TDP.
I’ve always assumed the ‘C’
I’ve always assumed the ‘C’ suffix meant that it was a combination of an unlocked CPU (K) and a 65 watt CPU (S). The only letter in the English alphabet that can make a ‘k’ sound and an ‘s’ sound is the letter ‘c’.
That’s what I’ve always thought anyways…
It’s a lot more mundane: ‘C’
It’s a lot more mundane: ‘C’ for ‘Crystalwell’.
Cutting the L3 to 6 MB is a
Cutting the L3 to 6 MB is a bit strange, but probably will not effect performance much for consumer level applications. The eDRAM cache could be very good for some server/workstation applications, but the small L3 cache and 32 GB memory limit kills that. Most applications that could use 128 MB eDRAM cache have memory footprints much larger than 32 GB. I have to wonder why they decreased the L3 to 6 MB. Is it a market segmentation thing or is it due to yeilds? That is, are the chips really 8 MB L3, but parts of the cache are defective forcing them to sell it at 6 MB? The cache is extremely dense and sensitive to defects.
From this die photo, you can see how inefficient the eDRAM is on die area; the controller takes up a huge amount of area, relatively speaking. Placing gpu, CPU, and memory on an interposer seems like a far better solution, if it makes it to market in time.
The reason for the 6MB L3 is
The reason for the 6MB L3 is neither marketing or yields. The 5775C is a mobile Broadwell-H CPU in a desktop package. The H-series CPUs have a max of 6MB, so that’s what you get.
The 5676C with only 4MB L3 is another story.
Upon further investigation,
Upon further investigation, Intel does seem to make a lot more die variants than what I was aware of. With how high their volumes are, it is presumably worthwhile to make such a large number of variants. The fact that we are getting supposed desktop parts with smaller cache still implies that they may be having continued issues with 14 nm production. It isn’t plausible that the cycle they were on could be continued indefinitely anyway.
We will have to see how Skylake does, but I would expect it to have some issues also. For the consumer, I expect we will be seeing lower overclocking capability (again). Large cache Xeon parts may be slow in coming. Perhaps AMD will have some time to sell HBM server parts that do not need large on-die caches. HBM itself probably isn’t low enough latency to replace L3 cache but there is nothing stopping AMD (except development budget) from designing a specialized cache chip to go on a silicon interposer.
HBM is not for replacing
HBM is not for replacing cache memory, and nothing can beat the low latency of being there on the DIE right next to the CPUs logic, that cache latency will not be bested by any off die memory. HBM is there to provide large chucks of data on a per clock basis, 4096 bits of data per clock, at much lower clocks that GDDR5, so I’m seeing APU systems with L3 caches designed to take at least the same number of bits of data/instructions and then cache the necessary commonly most recently used instructions in that L3 cache’s pages. I could see L3 caches being matched to HBM page for page/entry for entry, for code/data blocks that are recently evicted from even the L3 with the HBM maybe having some specialized lower latency buffer RAM to act essentially as a matched/multi-way buffer of recently evicted L3 entries, those ultra wide data paths from HBM and some extra standardized buffer RAM in the HBM’s base control logic chip, may be just the thing for creating an L4 cache, where the cache entry/page size is matched to the HBM data cannel width one to one into a L4 integrated into the HBM’s bottom chip. This extra cache logic/memory could be integrated into the silicon interposer substrate itself directly below the CPUs die, and maybe the latency could approach that of the on processor DIE cache. For sure, the extra cache snooping logic and data control paths could be extended off of a CPUs, or GPUs, DIE and there is plenty of space on the interposer to trace the extra logic paths for bus snooping for cache coherency logic/lines via the interposers ability to accept multi-thousands of off DIE control/logic/data paths, so any off processor die cache memory can maintain coherency with the other levels of cache that is on the processor’s physical DIE. This level of pin-out hosting in not possible on the standard socketed pin connected processors pre HBM/silicon interposer.
Hey Intel can I pay half for
Hey Intel can I pay half for the cpu. You can keep your gpu.
Nah, just put 10 more cores
Nah, just put 10 more cores in the place of that GPU for the same price…
Socket 115x parts do not have
Socket 115x parts do not have the memor interface to support that large a number of cores. There is a reason that the Xeon/Extreme Edition parts are quad channel memory. They may even go up to more channels in the future, although that may also be HMC based rather than DDR4.
hi , can you actually BUY
hi , can you actually BUY this ,. anywhere at all? or is it OEM only and quietly going EOL for retail? I ask as SKYLAKE is being pushed everywhere!
On Amazon through Intel
On Amazon through Intel Direct, but rumor has it Broadwell will have an open launch around the time Skylake does.
hi , can you actually BUY
hi , can you actually BUY this ,. anywhere at all? or is it OEM only and quietly going EOL for retail? I ask as SKYLAKE is being pushed everywhere!