Introduction, Specifications and Packaging

Can these stack up to the likes of Samsung?

Introduction:

Since their acquisition by Toshiba in early 2014, OCZ has gradually transitioned their line of SSD products to include parts provided by their parent company. Existing products were switched over to Toshiba flash memory, and that transition went fairly smoothly, save the recent launch of their Vector 180 (which had a couple of issues noted in our review). After that release, we waited for the next release from OCZ, hoping for something fresh, and that appears to have just happened:

OCZ sent us a round of samples for their new OCZ Trion 100 SSD. This SSD was first teased at Computex 2015. This new model would not only use Toshiba sourced flash memory, it would also displace the OCZ / Indilinx Barefoot controller with Toshiba's own. Then named 'Alishan', this is now officially called the 'Toshiba Controller TC58'. As we found out during Computex, this controller employs Toshiba's proprietary Quadruple Swing-By Code (QSBC) error correction technology:

Error correction tech gets very wordy, windy, and technical and does so very quickly, so I'll do my best to simplify things. Error correction is basically some information interleaved within the data stored on a given medium. Pretty much everything uses it in some form or another. Some Those 700MB CD-R's you used to burn could physically hold over 1GB of data, but all of that extra 'unavailable' space was error correction necessary to deal with the possible scratches and dust over time. Hard drives do the same sort of thing, with recent changes to how the data is interleaved. Early flash memory employed the same sort of simple error correction techniques initially, but advances in understanding of flash memory error modes have led to advances in flash-specific error correction techniques. More advanced algorithms require more advanced math that may not easily lend itself to hardware acceleration. Referencing the above graphic, BCH is simple to perform when needed, while LDPC is known to be more CPU (read SSD controller CPU) intensive. Toshiba's proprietary QSB tech claims to be 8x more capable of correcting errors, but what don't know what, if any, performance penalty exists on account of it.

We will revisit this topic a bit later in the review, but for now lets focus on the other things we know about the Trion 100. The easiest way to explain it is this is essentially Toshiba's answer to the Samsung EVO series of SSDs. This Toshiba flash is configured in a similar fashion, meaning the bulk of it operates in TLC mode, while a portion is segmented off and operates as a faster SLC-mode cache. Writes first go to the SLC area and are purged to TLC in the background during idle time. Continuous writes exceeding the SLC cache size will drop to the write speed of the TLC flash.

Read on for the full review!

Specifications:

  • NAND: Toshiba 19nm TLC
  • Capacity: 120GB / 240GB / 480GB / 960GB
  • Sequential Read: 550 MB/s
  • Sequential Write: 530 MB/s
  • 4K Random Read: 90,000 IOPS
  • 4K Random Write: 64,000 IOPS
  • Form Factor: 7mm high 2.5”
  • Interface Type: SATA 6.0 Gb/s (SATA 3)
  • Endurance: Up to 240TBW / 219GB/day (960GB)
  • Warranty: 3 years
  • Capacities in this review are highlighted bold.

The specs are not the highest we've seen, particularly the random write performance. More on that shortly. The write speed specs are a bit overzealous as well, as they are clearly rated off of the SLC-only area, with OCZ claiming the 'lowest' is 450 MB/sec for their 120GB model. We expect the TLC area will be more limiting here and will determine what those figures work out to during the course of the review.

Packaging:

Standard OCZ packaging. They have done away with the 3.5" bracket, likely as that is rarely needed in modern cases / systems.

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