Getting smaller features allows a chip designer to create products that are faster, cheaper, and consume less power. Years ago, most of them had their own production facilities but that is getting rare. IBM has just finished selling its manufacturing off to GlobalFoundries, which was spun out of AMD when it divested from fabrication in 2009. Texas Instruments, on the other hand, decided that they would continue manufacturing but get out of the chip design business. Intel and Samsung are arguably the last two players with a strong commitment to both sides of the “let's make a chip” coin.
So where do you these chip designers go? TSMC is the name that comes up most. Any given discrete GPU in the last several years has probably been produced there, along with several CPUs and SoCs from a variety of fabless semiconductor companies.
Several years ago, when the GeForce 600-series launched, TSMC's 28nm line led to shortages, which led to GPUs remaining out of stock for quite some time. Since then, 28nm has been the stable work horse for countless high-performance products. Recent chips have been huge, physically, thanks to how mature the process has become granting fewer defects. The designers are anxious to get on smaller processes, though.
In a conference call at 2 AM (EDT) on Thursday, which is 2 PM in Taiwan, Mark Liu of TSMC announced that “the ramping of our 16 nanometer will be very steep, even steeper than our 20nm”. By that, they mean this year. Hopefully this translates to production that could be used for GPUs and CPUs early, as AMD needs it to launch their Zen CPU architecture in 2016, as early in that year as possible. Graphics cards have also been on that technology for over three years. It's time.
Also interesting is how TSMC believes that they can hit 10nm by the end of 2016. If so, this might put them ahead of Intel. That said, Intel was also confident that they could reach 10nm by the end of 2016, right until they announced Kaby Lake a few days ago. We will need to see if it pans out. If it does, competitors could actually beat Intel to the market at that feature size — although that could end up being mobile SoCs and other integrated circuits that are uninteresting for the PC market.
Following the announcement from IBM Research, 7nm was also mentioned in TSMC's call. Apparently they expect to start qualifying in Q1 2017. That does not provide an estimate for production but, if their 10nm schedule is both accurate and also representative of 7nm, that would production somewhere in 2018. Note that I just speculated on an if of an if of a speculation, so take that with a mine of salt. There is probably a very good reason that this date wasn't mentioned in the call.
Back to the 16nm discussion, what are you hoping for most? New GPUs from NVIDIA, new GPUs from AMD, a new generation of mobile SoCs, or the launch of AMD's new CPU architecture? This should make for a highly entertaining comments section on a Sunday morning, don't you agree?
What am I hoping for? Well,
What am I hoping for? Well, for some of us, the mobile SoCs are interesting, if only as canary of what that process is capable of. Also, looking at Nvidia’s jump from Kepler to Maxwell by using techniques learned from the mobile side of their business, I am actually hoping AMD takes a cue from them in their APU family.
It isn’t a stretch to say AMD needs to compete in the low cost Tablet market of Windows devices, and this could enable them to do so.
It might also be time for AMD to push their multicore strategy to the heights Intel has achieved, with 24 core CPUs for workstations and servers, to help with their compute focused technologies. OpenCL and multi GPU systems benefit from more cores, and with AMD’s push for these types of tech, it should make sense they would have the best of these systems to take advantage of their R&D.
I also expect to see Nvidia come out with a new Tegra line on these nodes, with Pascal based graphics, and DX12 features for Windows 10 Tablets, as well as Vulkan and OpenGL ES 3.1+ based Android Tablets. They may even push for a phone.
Adding HBM to their APUs is a design win AMD will be implementing, and these smaller APUs with HBM could blow Intel based Tablets out of the water in sheer performance, but it remains to be seen how much they will be able to lengthen battery life in that form factor.
With Radeon backed graphics, they could be quite a nice hybrid device, though Intel’s latest Iris Pro GPU iteration seems to be giving them a run for the money.
Just a Zen APU that reaches
Just a Zen APU that reaches relative parity with Intel’s Sandybridge or Broadwell level of IPC performance when AMDs graphics are added to the equation it will be a big win over Intel’s high priced SKUs, HBM will seal the deals with the tablet/laptop OEMs. And AMD has the extra advantage of being able to utilize its high density libraries to add even more functionality to its upcoming 14nm low power mobile SKUs. Intel will still be trying to shoehorn its high power design libraries produced SKUs into the low power mobile using range, by reducing the clocks, and thermally throttling its mobile SKUs. AMD will be able to take the extra space savings it got on its 28nm Carrizo parts, in using its high density design libraries, and take the extra added die space savings along to 14nm and use that for its low power Zen APU variants, while the desktop Zen variants will be taped out using the standard design libraries. AMD was very innovative with Carrizo, and its use of high density design libraries to get more space out of a mature 28nm process node, and I just hope that those screen resolution options are available on the Carrizo based OEM Laptop SKUs, or I’ll be very suspicious of Intel’s influence on OEMs once again!
You seem to be mistaking AMD
You seem to be mistaking AMD for a company that has money and resources to devote to multiple design projects in parallel. That is clearly not the case.
But kudos for mentioning so many AMD marketing bullet points, I was only short a single “HSA” from reaching BINGO!
All this can come post Zen,
All this can come post Zen, and when the revenues support more engineering and R&D, for sure Apple would be interested in a Zen x86 based SKU with AMD graphics and HBM, and Apple could fund such an expenditure from its petty cash box. Apple could just step up to AMD’s custom design window and order a custom x86 Zen based APU with HBM, and I’m sure that AMD would be up to the task, if Apple choses to fund such an endeavor.
HSA is supported by more than just AMD and there is a whole foundation that can see the technological advancements and sound ideas around HSA, which incidentally is not just an AMD brand, HSA is a group of technologies that allow CPU, and GPUs, as well as other devices to be utilized for all manner of computational workloads, hell even GPUs back before there were GPUs for graphics were just large vector processors, so HSA has been around for decades in the computing field, so don’t just try to make HSA solely dependent on AMD, because the basic computing science term HSA has many advantages over the non HSA aware OS/software, and hardware systems of your favorite monolithic CPU monopoly.
Let’s try to differentiate marketing terminology from computing science terminology, and the Mobile device makers are very interested in HSA, and being able to use any and all available computing power, for any and all computing tasks, be it CPU, GPU, FPGA, or whatever! HSA is already built into Vulkan, and Vulkan’s ability to send more than just graphics workloads to the GPU, via its API’s abstraction layers.
Back to AMD, those companies that have chosen AMD for their custom APU SKUs will be increasing, and an x86 APU with all that Space Saving HBM will probably be on offer via AMDs custom division and those that want all the complexity moved off the PCB onto the much more compact and energy efficient interposer will be Knocking at AMDs custom door! And there is one company that is freakishly obsessed with thin and light, and that company’s wallet is not so thin and light, so do the math!
“And there is one company
“And there is one company that is freakishly obsessed with thin and light, and that company’s wallet is not so thin and light, so do the math!”
Perfect haha. This should be a slogan of some sorts!
I really hope AMD has
I really hope AMD has higher-priority targets for its future business than a hypothetical 6 million units a year custom silicon order from an OEM they have never worked with that has legendary demands in terms of delivery schedule and doesn’t mind bleeding their vendors dry.
“Mobile device makers are very interested in HSA, and being able to use any and all available computing power, for any and all computing tasks”
You seem to fundamentally misunderstand the challenges faced in the mobile device field.
Before you get excited about
Before you get excited about HBM in low-power applications, it should be noted that a single stack of HBM uses more power than a entire tablet SOC under load.
There are several different
There are several different upcoming standards, like wide io 2, which is similar to HBM. There will almost certainly be low power optimized HBM also.
That’s simply not true for
That’s simply not true for scalability reasons, and that HBM on the Fury, is not the same as the HBM that will go into the low power SKUs, and HBM’s lower clocks do save power, and HBM’s Uber wide data paths to its memory stacks allow for greater power savings across more than just GPUs. Being able to fetch 1024(per Stack) bits of data for every data access will come in handy, and there is no way in hell that a wider data path on any mobile device’s space constrained PCB will ever be able to host the data paths that just one HBM stack provides via the interposer’s silicon. Most mobile devices would do well with just one HBM stack and a single 1024 bit channel to HBM, but I’d imagine there will be plenty of room on a mobile interposer for more than one stack of HBM. You are not factoring in any die shrink improvements and such, nor are you seeing HBMs intrinsic advantage over even GDDR5 for bandwidth, what about the GDDR5 memory’s power usage on the competition’s product on the for top end discrete GPUs version of GDDR5, I’ll bet those numbers would even tax some laptop SKUs SOC system power usage. Just you keep up that damage control for the hands that feed you at that big monolithic CPU monopoly. HBM is going to get APU design wins for the Space savings alone, not to mention the better graphics from AMD. You never cease with your specious attack methods, do you!
As far as space saving is
As far as space saving is concerned, HBM has nothing on POP, then again, tablet vendors seem so far unconcerned about PCB size given the widespread use of DRAM packages along side the SOC.
And show me the tablet SOC that uses GDDR5 and we can gladly talk how HBM is superior to that technology in terms of power and power per bit.
I have to wonder how much
I have to wonder how much power reduction going from Kepler to maxwell actually came from reducing the double precision floating point from 1/3 of single precision to 1/32. The 780 was limited to 1/24, but I think the hardware was still there. That is a lot of hardware that was removed. AMD appears to have gone from 1/8 with Hawaii to 1/16 with Fiji which may be where some of the power savings came from.
Yes that’s were it comes
Yes that’s were it comes from, but it makes Nvidia’s GPUs less appealing for general purpose computing tasks, and Nvidia will give that back to you for a price, a very expensive price. AMD at least tries to strike a balance with its GPUs, and is damned by the Green Goblin’s gaming only fanboys for doing so, and AMD provides the extra SP and DP processing power at a much more reasonable price.
There are other uses for GPUs besides gaming, and AMD serves that need at a lower price.
The hardware is fused off and no power travels to the fused off regions. I’ll take a GPU with more than just gaming in mind, for better all around usage.
A ZEN apu with hbm would be
A ZEN apu with hbm would be nice… one that has 4 separate cores and its gpu performs on the level of the latest x60nvidia or x70amd video cards.
TSMC plans. Well, everyone
TSMC plans. Well, everyone can have a dream. In TSMC’s case their biggest dream is that, this time everything will go as planed.
Of course it will! Every good
Of course it will! Every good General knows that plans are what win battles, and the enemy always behaves as you expect!
Just as reminder to those
Just as reminder to those that think that IBM has sold any of its strategically important IP to GlobalFoundries to go along with the few patents that GlobalFoundries got in the fab business deal. IBM still retains its research division, and the patents that go along with 7nm, 14nm, 22nm, etc. including its CPU design patents, IBM is a large patent IP licenser and via its OpenPower foundation many of these patents will be licensable, and IBM’s research division has been has been tops in new patents for more than a few decades. You can be damned sure that any patents that IBM transferred to GlobalFoundries in its deal were of little strategic value, and a lot of the GlobalFoundries deal with IBM includes patent/IP licensing from IBM, the same goes for Samsung, as well as for any OpenPower IP licensees and the third party Power/Power8-8+, and Power9 licensable IP. The Power8+ is about ready to be introduced.
Keep your eyes on the upcoming Hot Chips Symposium in August, as always there will be plenty of the latest in CPU/GPU/FPGA etc. white papers and presentations.
Remove the superfluous [has
Remove the superfluous [has been], damn Cut and paste!
such annoying nonsense
such annoying nonsense
An yet the OpenPower
An yet the OpenPower foundation membership continues to grow, with Google being a prominent member. But as you just sit there chewing your ATOM duds, just Know that Google buys server chips by the shiploads and is testing its own customized Powre8 silicon! Oh the implications of licensable IP to the big x86 chip monopoly’s bottom line and fat margins! How is that contra revenue working out for you big x86 chip monopoly. What’s that you had to roll that mobile division into another division to hide the bleeding!
What are the implications of HBM, and AMD’s ability to integrate it into a APU/system on an interposer, could a large space saving, thin and light obsessed cash abundant company be thinking about commissioning a custom x86 based APU with HBM and much better graphics for its line of laptops, or even its cylindrical offerings with something Zen and 16 with HBM, and Arctic Islands graphics. 2 of those attached to a triangular heat sink at 2 processor threads per core, and lots of wide data channels to HBM for the CPUs, and GPUs! There would not be even be a need for a mainboard to host the Xeon, that space could be made available for one or 2 PCIe x16 and other slots for some red rocket action, and such. And AMD has dibs on HBM for a good while having been in on the development phase and investing wisely on actual new technology rather than contra revenue. I’m all for AMD getting a power8 license also, nothing stopping them from doing some custom integrating with other ISA based devices, and K12 comes to mind with AMD working on its own custom ARMv8 running APUs, most likely utilizing HBM on an interposer also, and just maybe the first ARMv8 custom kit that supports SMT, Jim Keller has hinted at that a few times.
But that just grates on your nerves, so heavily vested in your dino-zillia’s market milking CPU shoehorning fat laden behemoth! That tick-tock is slowing down for some more thorough market milking and mediocre graphics pushing!
I’d be way more excited if
I’d be way more excited if Qualcomm either finally learned the lesson of 15 years ago in the PC space (IPC > clockspeed > stupid core counts) or were usurped by someone else who does, rather than seeing the minimal improvements these process steps will manage to bring to mass-produced SOCs be wasted on more stupid ARM reference cores.
Apple A7 |
Apple A7 |
CPU Codename Cyclone |
ARMv8-A ISA (32/64-bit) |
Issue Width 6 micro-ops |
Reorder Buffer Size 192 micro-ops |
Branch Mispredict Penalty 16 cycles (14 – 19) |
Integer ALUs 4 |
Load/Store Units 2 |
Load Latency 4 cycles |
Branch Units 2 |
Indirect Branch Units 1 |
FP/NEON ALUs 3 |
L1 Cache 64KB I$ + 64KB D$ |
L2 Cache 1MB |
L3 Cache 4MB |
The A8/A8X probably some more improvements over this, but Apple is not saying and who Knows what the A9 will bring as far as IPC improvements! That Cyclone is closer to a desktop CPU core’s execution resource count and is definitely a very wide order superscalar design.
Compare Cyclone’s A7, or A8 now(Cyclone 2), microarchitecture to the core i series in execution resources! It’s the custom ARM microarchitectures that will give Chipzilla the contra revenue heartburn, about 7+ billion dollars in heartburn spent over the last few years. The Reference ARM cores, even the ARM A72, is not as wide as the Cyclone, or the Denver, and the K12 is on the way from AMD with possibly SMT capabilities baked in to that custom microarchitecture
what are you hoping for
what are you hoping for most?
New GPUs from NVIDIA? Yes.
New GPUs from AMD? Yes.
A new generation of mobile SoCs? Couldn’t care less.
The launch of AMD’s new CPU architecture? YES.
“So where do you these chip
“So where do you these chip designers go?”
I am hoping for new cpu at 16
I am hoping for new cpu at 16 cores, 5ghz and hbm2?
One thing to consider is that
One thing to consider is that the process node has become just a name and little more. What TSMC calls 16 nm may not be comparable to what Intel calls 16 nm. I suspect yeilds are not going to be good at these small process nodes regardless of what they call it. Intel seems to be having trouble with 14 nm; we have not seen anything but very small die parts so far, at least not in large volumes. Yields on the larger parts might be bad. High end GPUs are not going to be small. With the silicon interposer technology, it may actually be best to design a multi-die solution with several smaller die for these process nodes.