The achillies heel of processing density is heat and how to radiate it away from the parts doing the work, which is why processors and memory tend to be very flat.  This has change, we have begun to see 3D VNAND become common on the marketplace thanks to reduced heat generation and a variety of arcane tricks some of which Al explained last year.  Processors offer a more significant challenge, the TDP is much larger than that of flash and hotspots are more common and have a much more drastic effect on performance.  They can also be more difficult to fabricate; there is quite a trick to baking the interior of the chip without overcooking the external layers

Stanford University is working on what they call Nano-Engineered Computing Systems Technology, or N3XT which is working on Through Silicon Vias for processors. If successful this would allow a similar structure to current 3D VNAND on a processor which would vastly increase processing density.  The lower temperatures required to fab carbon nanotube transistors may just be what the industry has needed.  Make sure your brain is turned on and read on at The Inquirer.

"One way in which Stanford University is exploring this is by using carbon nanotube technology in high-rise chip architecture processes. Working alongside other universities, Stanford engineers have created this new technology, which it calls Nano-Engineered Computing Systems Technology, or N3XT."

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