The Inquirer offered some sad news for anyone hoping to see GDDR6 next year as Samsung is now aiming to deliver in 2018. The specifications remain the same, internal bandwidth topping out at 16Gbps, compared to GDDR5X at 12Gbps. That will translate to a maximum of 512GBps on a 256-bit memory bus, 786GBps on a 384-bit bus. Mobile devices will also appreciate the new standard as it should use around 20% less power, good news for those who buy gaming laptops.
"SAMSUNG HAS ANNOUNCED that GDDR6 memory interface technology will be introduced in 2018, not 2017 as was previously expected."
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isn’t that GDDR5X also have
isn’t that GDDR5X also have the potential to hit 16Gbps as well according to micron?
I believe so, yes.
I believe so, yes. Eventually.
Yeah, I thought GDDR5X was
Yeah, I thought GDDR5X was supposed to hit 16gbit also — so basically now we are going to have two competing memory standards? It would be good to see an article somewhere comparing the two in detail. I wonder if GDDR6 will even take off as it seems like it doesnt really have any advantages over GDDR5X which is already shipping in products … so… Micron really beat Samsung to the punch here it seems.
GDDR6 is supposed to have
GDDR6 is supposed to have lower power dissipation, right? That’s going to make it useful at least in mobile applications.
From the headline i thought
From the headline i thought you were talking about the speed of the chips.
Haha from the headline I knew
Haha from the headline I knew it was Hellstrom pun
It seems that HBM might
It seems that HBM might remain too expensive for the consumer market, until they do some things to cut cost, so they will need to extend GDDR yet again. I don’t know how workable HBM will be without silicon interposers though. HBM doesn’t actually need the level of interconnect provided by a silicon interposer, but it is probably more than what can be easily done on a PCB. It will be interesting if they can pull it off on a PCB some how though. A slightly more complex interface could be clocked higher at the cost of a bit more power. I believe the current interface is similar to DDR2. Using a higher power interface takes away some of the advantages of HBM, but if they can make it cheap, it may be worth it. I don’t think extensions of GDDR are really the future. I suspect they will still use stacked memory, on the same package as the GPU, even if interposers are too expensive. Stacked memory has quite a few advantages, even if it isn’t on an interposer. It would be interesting to be able to stack the memory directly under the gpu, without any kind of interposer, but that is probably at least 2 more generations out if then.
Micron’s HMC has been in use
Micron’s HMC has been in use since 2015 and does not require an interposer.
The HPC/Workstation/Server
The HPC/Workstation/Server markets are eating all the HBM2 that can be made, and those markets can afford to pay better markups than the price sensitive consumer market. So the server market will pay the higher costs of HBM2 and run those parts 24/7/365 and get the higher costs back in power savings alone from HBM2, not to mention being able to handle more server transactions using HBM2. So until the HPC/Workstation/Server get their needs met and there are supplies of HBM2 to spare for the consumer markets at a much lower cost than GDDR6 and maybe low cost(Gimped) HBM may have to fill the consumer market’s needs. At least the professional HPC/Workstation/Server markets will end up paying for R&D costs of HBM/HBM2, but the consumer markets will have to wait for the HPC/Workstation/Server markets to get their supply needs met. Those GPU accelerators for the HPC/Workstation/Server are being used in increasing numbers so hopefully they can rap up HBM2 production enough to get more HBM2 available, the more HBM2 they make and sell the faster the R&D costs can be recouped and sooner the consumer market will see more HBM2 based products. GDDR6 will be around for a while, unless they can get the Low cost HBM quickly out of specification phase with JEDEC and onto the market, with low cost HBM having less TSVs and a narrower interface(512 bits).
https://www.extremetech.com/wp-content/uploads/2016/08/LowCostHBM.jpg
edit: rap up
to: ramp up
edit: rap up
to: ramp up
Well, there is a rather
Well, there is a rather interesting technolgy called ThruChip Interface made by a company called ThruChip which uses electromagnetic induction to communicate between stacked chips.
With 4x64Gbit stacks of UltraMemory it will have 4.1 TERABYTES PER SECOND of memory bandwidth.
The induction based ThruChip is for data, and they developed wafer thinning with DISCO, Fujitsu and University of Tokyo so that power can be delivered via highly doped silicon directly.
Watch this for more info. A lot better than TSVs it seems.
https://youtu.be/S-hBSddgGY0