PC Perspective Podcast #414 – 08/25/2016
Join us this week as we discuss the newly released architecture details of AMD Zen, Audeze headphones, AMD market share gains and more!
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Hosts: Ryan Shrout, Allyn Malventano, Josh Walrath and Jeremy Hellstrom
Program length: 1:37:15
Week in Review:
News items of interest:
Hardware/Software Picks of the Week
Zen was originally aimed at
Zen was originally aimed at 2015 according to AMD years ago. Earlier this year it was an end of 2016 product.
Watercooling – water actually makes the delta worse because of the additional interface (metal > water > metal > air verses metal > air), each interface causes inefficiencies and changes the delta. The advantage of watercooling is that you can move the heat somewhere else and spread it over a larger area than you can from around the CPU socket and also get access to outside the case air (for exhaust or intake).
“Zen was originally aimed at
“Zen was originally aimed at 2015 according to AMD years ago. Earlier this year it was an end of 2016 product.”
According to AMD Zen is a 2017 release… and they never claimed otherwise, although there were leaks that suggested a release in Q4 of 2016. It has been known since 2015, that it’s going to be 2017 product.
Someone somewhere claimed in 2014 a few days before the Core Innovation Update Thing (where they actually confirmed working on a new architecture), that they would unveil a new architecture in 2015… and they did exactly that one year later. They didn’t launch it though.
Claiming to develop, produce and release a brand new architecture within a time frame of 3 years is plain ridiculous.
Jim Keller’s design Teams
Jim Keller’s design Teams where working on Zen and K12(Custom ARMv8 ISA running design from AMD) concurrently, so there was a lot of engineering work going on for Both Zen and K12, and K12 may just have the same types of Core features as Zen, like Cache systems and Cache arrangements etc. K12 may even be a Custom ARMv8A ISA Running micro-architecture that has SMT capabilities so it can support 2 or more processor threads per core, so that may be a first for any custom ARMv8A ISA Running micro-architecture. Keller is on video(YouTube) stating that there was a lot of sharing of CPU core design ideas among his two, Zen and K12, design teams with a lot potential for cross usage of designs among the respective teams’ CPU core engineering concepts.
Now that Zen core details of
Now that Zen core details of the micro-arch is mostly revealed with a few more details remaining to be filled in, there needs to be some more information on the coherent interconnect fabric that’s used inside the 4 Zen cores complex and the fabric that is used outside the 4 Zen cores in a complex. There has to be some sort of fabric/interconnect among the 4 Zen cores in a complex other than the sharing of a Level 3 cache, for things like Cache snooping/coherency and other inter-CPU core communication, and some form of larger connection fabric for inter complex communication outside the 4 Zen cores complex/s that will make up the 8, 16, 32 core consumer desktop and server variants.
It will be the coherent interconnect fabric among the varying numbers of 4 Zen cores complexes from 8 up to 32 Zen cores or 2 to 8 total numbers of Zen cores complexes that will have to support the communication with the off core DRAM/GPUs/other systems and other off core support for multiple Zen dies to communicate among larger groupings of processors in a scale up or scale out fashion for the server room variants.
So more investigation is in order for Zen, and all of the Zen variants that will be customized for the Mobile to supercomputer usage of Zen based CPU cores only SKU, and the Zen APU SKUs. So next is trying to get any new information on the Zen Based APUs on an interposer for the server, HPC, and workstation markets. Also there are going to be the Mobile and Laptop Zen APU variants that may or may not be laid out using the GPU style high density design libraries. AMD got its Carrizo CPU cores at 28nm to take up 30% less space(without having to do a process node shrink) simply by using its GPU style high density design/circuit layout libraries in the layout of its 28nm Carrizo core!
So if AMD takes those high density design libraries to a mobile Zen core variant at 14nm and gets that 30% space saved on top of the 14nm process node shrink savings and uses that space saved for even more Polaris CUs/ACEs on its mobile Zen APU variants, and AMD could really have some great APU integrated graphics that Intel will not be able to match.
The only draw back to using the High density design libraries in the layout of a CPU core’s circuitry is that the circuits being more densely packed can not be clocked as high as a CPU core that is laid out using the nominal lower density CPU design libraries. But Mobile CPU cores are not clock high to begin with for power usage and thermal reasons, so why not use the high density design libraries on Zen CPU cores that are going to be clocked lower anyways and use the spaced saved for more GPU resources for an APU’s integrated graphics.