In addition to the company’s efforts to get its own next generation FinFET process technology up and running, GlobalFoundries announced that will continue to pursue FD-SOI process technology with the addition of a 12nm FD-SOI (FDX in GlobalFoundries parlance) node to its roadmap with a slated release of 2019 at the earliest.
FD-SOI stands for Fully Depleted Silicon On Insulator and is a planar process technology that uses a thin insulator on top of the base silicon which is then covered by a very thin layer of silicon that is used as the transistor channel. The promise of FD-SOI is that it offers the performance of a FinFET node with lower power consumption and cost than other bulk processes. While the substrate is more expensive with FD-SOI, it uses 50% of the lithography layers and companies can take advantage of reportedly easy-to-implement body biasing to design a single chip that can fulfill multiple products and roles. For example, in the case of 22FDX – which should start rolling out towards the end of this year – GlobalFoundries claims that it offers the performance of 14 FinFET at the 28nm bulk pricing. 22FDX is actually a 14nm front end (FEOL) and 28nm back end of line (BEOL) combined. Notably, it purportedly uses 70% lower power than 28nm HKMG.
A GloFo 22nm FD-SOI "22FDX" transistor.
The FD-SOI design offers lower static leakage and allows chip makers to use body biasing (where substrate is polarized) to balance performance and leakage. Forward Body Biasing allows the transistor to switch faster and/or operate at much lower voltages. On the other hand, Reverse Body Biasing further reduces leakage and frequency to improves energy efficiency. Dynamic Body Biasing (video link) allows for things like turbo modes whereby increasing voltage to the back gate can increase transistor switching speed or reducing voltage can reduce switching speeds and leakage. For a process technology that is aimed at battery powered wearables, mobile devices, and various Internet of Things products, energy efficiency and being able to balance performance and power depending on what is needed is important.
22FDX offers body biasing.
While the process node numbers are not as interesting as the news that FD-SOI will continue itself (thanks to marketing mucking up things heh), GlobalFoundries did share that 12FDX (12nm FD-SOI) will be a true full node shrink that will offer the performance of 10nm FinFET (presumably its own future FinFET tech though they do not specify) with better power characteristics and lower cost than 16nm FinFET. I am not sure if GlobalFoundries is using theoretical numbers or compared it to TSMC’s process here since they do not have their own 16nm FinFET process. Further, 12FDX will feature 15% higher performance and up to 50% lower power consumption that today’s FinFET technologies. The future process is aimed at the “cost sensitive mobile market” that includes IoT, automotive (entertainment and AI), mobile, and networking. FD-SOI is reportedly well suited for processors that combine both digital and analog (RF) elements as well.
Following the roll out of 22FDX GlobalFoundries will be preparing its Fab 1 facility in Dresden, Germany for the 12nm FD-SOI (12FDX) process. The new process is slated to begin tapping out products in early 2019 which should mean products using chips will hit the market in 2020.
The news is interesting because it indicates that there is still interest and research/development being made on FD-SOI and GlobalFoundries is the first company to talk about next generation process plans. Samsung and STMicroelectronics also support FD-SOI but have not announced their future plans yet.
If I had to guess, Samsung will be the next company to talk about future FD-SOI as the company continues to offer both FinFET and FD-SOI to its customers though they certainly do not talk as much about the latter. What are your thoughts on FD-SOI and its place in the market?
Also read: FD-SOI Expands, But Is It Disruptive? @ EETimes
FD-SOI Is so damn interesting
FD-SOI Is so damn interesting IT’s a shame only a handful or sadly not that large players (anymore) are investing in it.
That’s the power of the
That’s the power of the marketing where the expertise is meaningless. That’s also the weakness of the media for promoting sh!t for money while the consumer think to make a good deal without the good data in his hands.
EDA is becoming exponentially
EDA is becoming exponentially more complex as nodes shrink. I hope they do plenty of DRC and make the proper reliability assessments before they produce anything.
Thats more of a general statement about the entire industry than just the FD-SOI. Someone from Intel said that FinFET, Gate All Around and nanowires was the future and that they didnt see the point in FD-SOI.
I think the design cost bound
I think the design cost bound to the complexity of new nodes based on marketing lies such as FinFET will kill the main benefit (a higher performance per buck) of any node shrink.
It make me think about the SMR technology used for HDD with a lower writing speed but still a higher density.
Actually most people think “new” means “better” but that’s not always the case. Watch your kids guys! :o)
Im not one of those people.
Im not one of those people. You should see the stuff i write about idiots replacing incandescent or other effective and safe lighting tech with retina destroying white LEDs.
Or how the vast majority of TVs and monitors are worse today than a decade ago, thanks to shitty WLED backlights.
I know new is usually worse in a market with a worthless dollar and everything most people buy is made in China shit.
Global Foundries should merge
Global Foundries should merge with Samsung in order to be competitive against TSMC or Intel foundries. It would make it easier to implement technologies from both sides.
Why is that merger necessary
Why is that merger necessary when Global Foundries can just license the fab technology from Samsung/others. You do realize that Intel did not invent FinFet, and everybody has to license some IP from others, even Intel licenses IP from others!(1) I’ll bet that University of California, Berkeley and other universities have lots of chip fab IP licensed by Intel and other chip fabs. And IBM, Global Foundries, and Samsung have been in a big chip fab technology/IP sharing and cross-licensing agreement/foundation for some years! So Global Foundries/Samsung and others can license from IBM’s very large patent portfolio of chip fab IP. Hell IBM paid Global Foundries to take over IBM’s commercial chip foundries and gave Global Foundries some chip fab IP, and chip fabs, but IBM still retains most of its very important chip fab IP/patents and research fab capacity.
If Global Foundries needs an updated 14nm or smaller FinFet process it just may be cheaper in the long run to license it from Samsung for 14nm and 10nm and below. I’ll bet that a lot of the FD-SOI process comes from IP that IBM provided to Global Foundries when Global Foundries took over IBM’s chip fabs because Global Foundries will be providing IBM with chip fab services for IBM’s power8/power9 products. GF will be providing fab services for any OpenPower licensee than needs to have any licensed third party Power8/power9 chips made. IBM has such a large patent portfolio of FD-SOI, and other chip fab IP, that if the licensed third party power8/power9 market needed more chip fab capacity than Global Foundries could provide then Samsung could be called upon to produce/provide some of the third party power8/power9 chips for Google and the other
“The term FinFET (Fin Field Effect Transistor) was coined by University of California, Berkeley researchers (Profs. Chenming Hu, Tsu-Jae King-Liu and Jeffrey Bokor) to describe a nonplanar, double-gate transistor built on an SOI substrate, based on the earlier DELTA (single-gate) transistor design. The distinguishing characteristic of the FinFET is that the conducting channel is wrapped by a thin silicon “fin”, which forms the body of the device. The thickness of the fin (measured in the direction from source to drain) determines the effective channel length of the device. The Wrap-around gate structure provides a better electrical control over the channel and thus helps in reducing the leakage current and overcoming other short-channel effects.”(1)
“Why is that merger necessary
“Why is that merger necessary when Global Foundries can just license the fab technology from Samsung/others.”
Because Global Foundries implemented it badly and they don’t currently have many clients if not AMD. The merger would enable to avoid the cost of license and bad implementation.
Time is money and I don’t think Global Foundries have a lot of time and money to waste in the improvement the yield of “their” 14nm FinFET implementation.
Once more, their only client (AMD) is looking for diversification for producing its chips like any chip designer should to limit the commercial risk of shortage.
How did GF implement it
How did GF implement it badly, The RX 480 uses more power because the RX 480 has more FP units than the GTX 1060 so AMD’s RX 480/RX 470 GPUs use more power because they have more hardware units, in addition to more FP units! How is that GF’s fault? The RX 480 gets more flops running at lower clocks than the GTX 1060. How is the RX 480/Polaris more hardware resources drawing more power than Nvidia’s GTX 1060 GF’s fault!
I’d rather have the RX 480 and the extra compute than the GTX 1060 that is tuned for only gaming and not compute! I use my GPUs for more than just gaming, and I like that extra compute at a very affordable price point relative to Nvidia’s overpriced kit! GF’s 14nm does a good job with AMD’s RX 480 and considering AMD’s GPUs have more compute hardware it’s not GF’s fault about any AMD Polaris power usage problems that’s on AMD.
There are plenty of people using AMD’s GPU that could not give a rats red A$$ about gaming, as they use GPUs for other types of rendering and compute accelerations uses and save plenty of money by going with AMD’s GPU products! GPUs are not all about gaming, and I can get 4 RX 480s and still have about $200 remaining compared to one Titan X(Pascal)! And the 4 RX 480’s will give me about twice that FP Flops as the $1200 Titam X(Pascal).
In DX12/Vulkan even games will make use of async-compute so AMD has my business for the RX 480 with more compute for the dollar!
“How did GF implement it
“How did GF implement it badly”
See the output defects from Global Foundries and the cost AMD have to pay to keep its subsidiary on track…
GF is not a subsidiary of
GF is not a subsidiary of AMD, and that wafer contract payments issue is on AMD not GF, AMD signed on the dotted line so it’s on AMD. Your arguments make no sense! And every foundry has had issues even Intel’s fabs had issues with the 14nm process node. GF/Samsung/IBM are all in the market to get the fab processes working across their fabs because Google is going to be making lots of custom Power9 based systems for Google’s massive server farms. So Google alone is a very large licensee, among many OpenPower licensees, for the OpenPower Power9 CPUs that Google will be using, along with probably some Nvidia Tesla GPU accelerators!
P.S. there is nothing stopping both AMD and Nvidia(Already there for some GPU business) from becoming OpenPower power9 licensees and making some revenues/profits from the OpenPower market! Nvidia could get a Power9 SKU(The SMT4 variant) and have an 8 core CPU with 32 processor threads for a very powerful NVLink enabled gaming server to sell to the 5% market that has the dosh to afford it!
“GF is not a subsidiary of
“GF is not a subsidiary of AMD”
Actually Global Foundries is an AMD subsidiary since they are both owned by Abu Dhabi and AMD is its only client.
“Your arguments make no sense!”
Indeed, it can’t make sense for any AMD supporter or shareholder…
“And every foundry has had issues even Intel’s fabs had issues with the 14nm process node.”
Don’t try to hide the dead body of Global Foundries because the yield of their 14nm FinFET implementation sucks so much that AMD have to delay to production of their overhyped Zen architecture to limit the penalty cost if they choose a Global Foundries competitor even for Samsung.
Here read about GF’s 7nm
Here read about GF’s 7nm process and look there is IBM, helping with the research! As quoted in the TechPowerup article/press release! Big Blue has got some killer patent portfolio and world class R&D help for GF, and even Samsung!
“IBM is committed to pushing the limits of semiconductor technology as part of its aggressive long term research agenda,” said Arvind Krishna, senior vice president and director of IBM Research. “IBM Research continues to collaborate with GLOBALFOUNDRIES in developing new ideas, new skills and new technologies that will help accelerate our joint research in 7nm technology and beyond.”(1)
“GLOBALFOUNDRIES Announces its 7 nm FinFET Technology”
“Globalfoundries has announced it is ignoring 10nm and will go directly to the 7nm FinFET chip production by early 2018.”
Yet another lie from Abu Dhabi’s companies…
Why producing in mass Zen with a 14nm FinFET designed mask in early 2017 when you expect to be able to make 7nm chips in early 2018?
NB: Don’t drink oil, it’s only useful for cars not for men!
“Everspin and Globalfoundries
“Everspin and Globalfoundries are announcing pMTJ ST-MRAM for GF’s SOI process. SemiAccurate thinks this is important because of its relationship to flash or at least embedded flash.
The short version is that Everspin’s perpendicular magnetic tunnel junction (pMTJ) Spin Torque MRAM is now in production as discrete chips at GF. Just for fun Everspin built a PCIe SSD out of those 256Mb chips to show off their capabilities. It may be only 1GB in size but this PCIe SSD, effectively an FPGA and memory, was pushing some pretty astounding numbers. How does 1.5M IOPS at 4K block size strike you? What if I told you it was 100% writes?”(1)
“Everspin and Globalfoundries team up for embedded ST-MRAM”
STT-MRAM has been around for
STT-MRAM has been around for a while. It has a different set of problems to DRAM, SRAM and flash, but its extremely high density compared to SRAM and nonvolatile, so it could be used as a cache.
Its already been commercially used by Mangstor in their NVMe PCI-E SSD that costs about $10K as 320MB nonvolatile cache along with 4GB of DRAM. It replaces the supercapacitor based backup for cache data power loss protection.
“so it could be used as a
“so it could be used as a cache”
I agree but it doesn’t worth the extra cost for any kind of cache line strategy.
I think a frequency based algorithm would be more efficient with a non volatile memory.
This kind of memory could be used to improve the cache efficiency in addition to the current technology by the mean of a multilevel cache with different cache line strategies.
For example, SRAM could be used to get the more recent cache line while MRAM could be used to get the more frequent one.