We are just starting to ramp back up here after the long holiday weekend, so let's start with something that is both interesting and easy to absorb. High-profile overclocker Der8auer has gotten his hands on an 18-core Skylake-X processor and did exactly what you would expect – delidded it.
The takeaway from this is two-fold. First, the die appears very clean, indicating that Intel has still not decided to solder these high-end processors and is going with a standard thermal interface between the die and the heat spreader.
Also…it's friggin huge. Look at the 10-core die from the Core i9-7900X that was observed earlier this year and compare it to the image above.
Though the camera angles aren't ideal, comparing the layout of the die to the physical substrate, which IS the same size between all the Skylake-X processors, you can see how much larger this 18-core die truly is. Expect to see the 18, 16, 14, and even the 12-core processors to use the same physical die.
Still using shit TIM on a
Still using shit TIM on a high end part? Intel must feel the cents they save not using solder is worth the bad PR.
“shit TIM”
The meme that just
“shit TIM”
The meme that just doesn’t die (pardon the pun), despite it being known for years that the TIM itself is perfectly fine and the issue is the separation between the top of the die and underside of the IHS: https://forums.anandtech.com/threads/delidded-my-i7-3770k-loaded-temperatures-drop-by-20%C2%B0c-at-4-7ghz.2261855/page-23#post-34053183
Key chart rehosted because Photobucket crapped themselves: http://i.imgur.com/DLdU0rE.jpg
Doesn’t change the fact that
Doesn’t change the fact that intel are bastards and cutting corners on high end high margin products.
That’s the Mighty Intel
That’s the Mighty Intel Ziggurat of MILKING layers and consmers are now choosing the more affordable AMD Option with the better PCIe/other features offered at none of the extra artificial product segmentation that Intel is so infamously known for doing with it’s overpriced kit.
And now the consumer has its so much better with AMD’s more affordable options.
It’s probably more that
It’s probably more that eliminating the soldering equipment (i.e. all the process equipment to add extra PVD coatings to the dies and IHS underside) saves a bundle in rolling out new fab lines, and if they can maintain the required thermal performance without it, then they can bear the weeping of the I-want-to-OC-super-hard-but-delidding-scares-me crowd.
RyZen would make for an interesting testbed: soldered as stock, delid and add TIM, then delid and add TIM + shim. That would give hard numbers as to what the actual performance impact is for smaller dies.
Anandtech is owned by intel
Anandtech is owned by intel … never talk them for anything other than Intel ads source.
*never take…
*never take…
Ryan, I suggest you re-read
Ryan, I suggest you re-read this news post, and perhaps rephrase some parts:
“High-profiles overclocker Der8auer has gotten his hands on an 18-core Skylake-X processor and one exactly what you would expect – delidded it. ”
“Though the angles are ideal, comparing the layout of the die to the physical substrate, which IS the same size between all the Skylake-X processors, you can see how much larger this 18-core die truly is. ”
you can delete this post afterwards
No need to delete, thanks for
No need to delete, thanks for the info!
“Got his hands onan 18-core
“Got his hands onan 18-core Skylake-X processor” That’s right these just fall off of trucks. Its not a viral leak campaign at all. Nope.avi
Intel initially claimed that
Intel initially claimed that the reason they used TIM was because the solder had a tendency to damage the smaller cores. This CPU does appear to point that being a lie, as this is more than likely a high thermal output CPU and a big one. Its a prime candidate for solder.
Interesting how there is 2
Interesting how there is 2 layers of substrate there, a smaller one on top of a larger one. The last time I remember seeing something like that was the original P4, socket 423!
Someone needs to delid that
Someone needs to delid that glued on substrate, odds are its a 1151 cpu on there.
Why do you say odds are it’s
Why do you say odds are it’s 1151? Where do they fit the extra 2 memory channels and additional 28 PCI-e lanes if it’s a 1151 cpu?
Magic
Magic
It isn’t hard to place a die
It isn’t hard to place a die with more connections on a PCB with less. You just don’t route the unneeded connections in the PCB. AMD zeppelin die have a huge number of connections, many of which are not routed for many products. A die could be a Ryzen processor with 24 HSIO lanes or part of a dual socket Epyc processor with all 128 HSIO/interprocessor links in use.
“It isn’t hard to place a die
“It isn’t hard to place a die with more connections on a PCB with less.” Agreed. But this is the other way around. How do you fit an 1151 cpu on a lga2066 socket and still provide the additional power, quad channel memory bandwidth, and extra pci-e lanes through those 1151 pins?
I’d like to see that. Does
I’d like to see that. Does anyone know why there are 2 separate substrate wafers on skylake X?
It’s probably not the only
It’s probably not the only reason but the second substrate has the RFID chip on it, maybe it’s something to do with that.
Far from massive when
Far from massive when compared to 16 core thread ripper and funny how Intel manages so many cores on a single die compared to 16 thread ripper that uses 4 lol Intel knows their shit when it comes to cpu.
Really AMD is getting 80%+
Really AMD is getting 80%+ die/wafer yields on those 8 core Modular Zeppelin dies that AMD uses across its Ryzen 7, 5, 3, Threadripper, and Epyc SKUs. And 16 core Threadripper is only using 2 dies with the other 2 dies being filler dies to keep the Large TR IHS from warping. That Large IHS with those 2 active TR/Zeppelin Dies that are placed at a diagional with each die phsically seperated thermally so TR can make the higher sustained boost clocks relative to Intel’s large monolithic dies that generate a lot of heat that soakes into all the cores keeping them from maintaining longer periods of maximum all core boost clocks.
And AMD manages to place thousands of GPU cores on it’s monolithic GPU dies that when Navi arrives will be instead be made up of smaller scalable/modular GPU dies that will net AMD those same High Die/Wafer yields that AMD’s modular Zeppelin achieve.
Intel’s yields of its large monolithic CPU dies are not going to be that high as the more cores the per die the more likely there will be defective dies and lower die/wafer yields.
So AMD has such high yields on its Zeppelin Modular/scalable dies it can offer its CPU SKUs to consumers at pricing that Intel just can not match! So enjoy your segemented Intel over priced SKUs where you will get less PCIe lanes and have to pay extra money to use some RAID configurations on Intel motherboards. AMD will continue to get those High Wafer/Die Yielding 8 core Zeppelin dies coming off the wafer lines with more process tweaks and higher clocks as the entire Wafer/Die production process is fruther optimized and Intel will just look for more ways to segement its product lines to milk every last dollar from Its customers.
Look for AMD’s Navi GPUs to come ready made for the Mainstream to Flagship market with AMD able to quickly scale from low to high end GPU SKU while having the highest GPU Die/Wafer yields in the GPU market! You see how quickly AMD was able to bring its low to high end Zen/Ryzen and Zen/Threadripper, Desktop CPU SKUs to market with that modular Zeppelin die(Ditto for Epyc and the professional markets), so wait for the Modular Navi dies to arrive and all sorts of specilized GPUs for the Compute and Gaming markets will be made from the Modular Navi dies at 80%+ die/wafer yields!
Found the AMD shill.
Found the AMD shill.
Found the Abusive Monopoly
Found the Abusive Monopoly Interest’s apologist and AMD is curb-stomping Intel’s high margins! Oh how will Intel be able to afford its Loyalty Payments(Illegal Bribes) now that those high margin revenue streams are choking off!
How did that Contra Revenue(Bribes) work for Intel in the mobile phone markets that the ARM ISA based makers dominate. Oh that Contra Revenue that cost Intel Billions and nothing to show but the Intel Mobile division folded into a larger Intel division to hide the bleeding.
Oh where are Intel’s best friends that money can buy(co-conspirators) OEMs with the whole world watching Intel and waiting for them to try that nefarious dealings business all over again. The Mobile Devices market has told Intel to take a hike as that market does not want that Intel ring through its nose.
Look at those scurrying bean counters over at Intel down on all fours trying to find new an better ways of product segmentation to milk the fools for each little bit of feature enabled at that infamous Intel cost to the wallet. Oh how those bean counters are coming up with the Raid Keys($$$$) at extra added highway robbery prices to claw those dollars from its customers(victims). They are flooding the market with a dizzying array of confusing SKUs that need new motherboards with chip-sets and more dollars from the fools, and extra for those PCIe lanes and Linus just sits there on the curb in the rain with a big Face-Palm trying to make sense of Intel’s madness, and oh the madness with which Intel continues to segment, segment, and segment for every last drop of milk from that dry cow that has turned to jerky!
Thread ripper uses two dies
Thread ripper uses two dies and two spacers to support the heat spreader. Epyc uses 4 dies and hence has up twice as many cores and double the memeory channels and pcie lanes.
Why the 2 substrates again?
Why the 2 substrates again? Has anyone asked Intel about it? For the 4 core parts I would understand it being an adapter from 1151 to 2066 etc, but this substrate couldn’t even be a 2011 for more than 4 cores intel is using.
GamersNexus apparently asked
GamersNexus apparently asked Intel and got told it was “manufacturing reasons” so it’s just guess work.
http://www.gamersnexus.net/hwreviews/2961-intel-i9-7900x-review-benchmarks-game-streaming-vr-premiere?showall=1
Our present hypothesis, having not seen the server CPUs, is that the server CPUs might use more of the lower substrate and ditch the upper substrate, but Intel is keeping the same package for everything.
Did they have any actual
Did they have any actual measurements of the die? They can sell a lot of different salvage parts from the 18 core die, but with that size, a large number of them could be garbage. The yield on smaller process nodes is no where near what it was for larger nodes, so we are going to have to shift to smaller die sizes eventually. Current situation reminds me of the Opteron release, where AMD used on die memory controllers and interprocessor links. Intel claimed it was unecessary, but they switched to a similar architecture pretty quickly. Intel could make a device similar to Epyc quite easily. They have 8-core Xeon processors that are made for 4 socket systems. Place 4 of those on an MCM, don’t route all 4 or 6 memory channels, and you have a device very similar to Epyc without even making a new die. Intel wouldn’t have the economy of scale with it that AMD has with zeppelin die though. AMD can crank out millions of zeppelin die, and just stockpile the best for Epyc. We will have to wait and see how long Intel tries to hold onto giant high margin die. The prices for Epyc processors are going to be a lot lower than a comparable Intel part. AMD can probably make them for a very cheap prices also. It is the same die going from a Ryzen 3 all the way up to an Epyc processors. Even with the much cheaper price, AMD has a lot of room for profit.