Samsung recently announced that it has begun mass production of its second generation HBM2 memory which it is calling “Aquabolt”. Samsung has refined the design of its 8GB HBM2 packages allowing them to achieve an impressive 2.4 Gbps per pin data transfer rates without needing more power than its first generation 1.2V HBM2.
Reportedly Samsung is using new TSV (through-silicon-via) design techniques and adding additional thermal bumps between dies to improve clocks and thermal control. Each 8GB HBM2 “Aquabolt” package is comprised of eight 8Gb dies each of which is vertically interconnected using 5,000 TSVs which is a huge number especially considering how small and tightly packed these dies are. Further, Samsung has added a new protective layer at the bottom of the stack to reinforce the package’s physical strength. While the press release did not go into detail, it does mention that Samsung had to overcome challenges relating to “collateral clock skewing” as a result of the sheer number of TSVs.
On the performance front, Samsung claims that Aquabolt offers up a 50% increase in per package performance versus its first generation “Flarebolt” memory which ran at 1.6Gbps per pin and 1.2V. Interestingly, Aquabolt is also faster than Samsung’s 2.0Gbps per pin HBM2 product (which needed 1.35V) without needing additional power. Samsung also compares Aquabolt to GDDR5 stating that it offers 9.6-times the bandwidth with a single package of HBM2 at 307 GB/s and a GDDR5 chip at 32 GB/s. Thanks to the 2.4 Gbps per pin speed, Aquabolt offers 307 GB/s of bandwidth per package and with four packages products such as graphics cards can take advantage of 1.2 TB/s of bandwidth.
This second generation HBM2 memory is a decent step up in performance (with HBM hitting 128GB/s and first generation HBM2 hitting 256 GB/s per package and 512 GB/s and 1 TB/s with four packages respectively), but the interesting bit is that it is faster without needing more power. The increased bandwidth and data transfer speeds will be a boon to the HPC and supercomputing market and useful for working with massive databases, simulations, neural networks and AI training, and other “big data” tasks.
Aquabolt looks particularly promising for the mobile market though with future products succeeding the current mobile Vega GPU in Kaby Lake-G processors, Ryzen Mobile APUs, and eventually discrete Vega mobile graphics cards getting a nice performance boost (it’s likely too late for AMD to go with this new HBM2 on these specific products, but future refreshes or generations may be able to take advantage of it). I’m sure it will also see usage in the SoCs uses in Intel’s and NVIDIA’s driverless car projects as well.
If this new HBM2 adheres the
If this new HBM2 adheres the JEDEC HBM2 standard then it shoud be a drop in replacement for any older HBM2 variant so the sooner that Samsung can make the 8-HI and 4-HI HBM2 stacks available the sooner there can be products taking advantage of Samsungs latest HBM2 variant. That’s not going to be hard to implement on any systems. I’m sure that Samsung would rather be switching all of their production over to this newer HBM2 spin so that just extends Samsung’s leadership in the HBM2 market. SK Hynix is going to have to come up with some Improvments on its HBM2 offerings also or Samsung will continue to dominate the HBM2 market.
Depending on just what the New Vega Discrete Mobile GPUs will need to meet its bandwidth requirements any 4-Hi variants of Aquabolt may come in handy if Vega’s HBCC is making use of Vega’s Discret Mobile’s HBM2 as HBC for the caching to HBM2 of a larger amount of virtual VRAM out on DDR4 based memory. Mobile Vega with its 4GB of HBM2 will probably be making us of the HBCC/HBM2-HBC sorts of modes and games not needing to reduce their mesh/texture data to account for the smaller HBM2-4GB capacity that Vega Mobile will be using and the more bandwidth the better for Virtual VRAM paging swaps by Vega’s HBCC.
‘Each 8GB HBM2 “Aquabolt”
‘Each 8GB HBM2 “Aquabolt” package is comprised of eight 8Gb dies each of which is vertically interconnected using 5,000 TSVs which is a huge number especially considering how small and tightly packed these dies eyes.’
Dies are?
hah some weird autocorrect
hah some weird autocorrect going on i guess heh. thanks.
The dies have eyes!
The dies have eyes!
Nice to see a product not
Nice to see a product not only meet but exceed manufacturer promises.
8GB and 300GB/sec on a single low-power package is pretty sweet.
It must be difficult to plan
It must be difficult to plan which memory type (HBM, GDDR5/5x/6) to use when you start your GPU design years before you release a final product.
Things will probably be a bit volatile but hopefully ironing out the memory design kinks, building the new fab plants and even crypto-mining (hopefully disappearing) should stabilize over the next two or so years.
Any bets on the what the PS5 and next-XBox will use?
(hard to guess but it’s mainly a COST issue since there should be roughly 16 to 24GB of memory used… maybe 6x4GB stacks of HBM2? Probably too expensive.)
GDDR6 probably :-). Or maybe
GDDR6 probably :-). Or maybe HBM3 but not as likely. it is supposed to be lower cost and higher density though so it might work.
Would be nice to see this
Would be nice to see this compared to ddr6, which we should be seeing in nvidia gtx 11xx in about 2 months or so.