Jon Peddie Research have just released their latest look at the discrete GPU market, which has been doing significantly better than the PC market overall, for reasons we are all quite familiar with. While sales of full systems have declined 24.5%, GPU sales increased 6.4% over the past quarter and an impressive increase of 66.4% when compared to this time last year.
With just two suppliers in the market now, any gain by one results in a loss for the other, and it has been AMD's turn to succeed. The gain of 1.2% over this quarter is not as impressive as AMD's total gains over the past 12 months, which saw 7.4% of the sales once going to NVIDIA shift to AMD. Vega may not be the most powerful architecture on the planet, but it is selling along with previous generations of GPU.
The next quarter may level out, not just due to decreases in the purchasing of new mining equipment but also due to historical trends as stock is accumulated to prepare for sales in the fourth quarter. There is also the fact that it has been a while since either AMD or NVIDIA have released new kit and the majority of those planning an upgrade on this cycle have already done so.
Once we see new kit arrive and the prices of products from the previous generation receive discounts, there should be another spike in sales. The mystery is what the next generation will bring from these two competitors.
Hopefully AMD will get enough
Hopefully AMD will get enough market share that nvidia is forced to adopt adaptive sync, in place of or in addition to, gsync.
I wish Nvidia would adopt
I wish Nvidia would adopt adaptive sync regardless of AMD's market share…
Hear, hear. They have already
Hear, hear. They have already demonstrated that they can facilitate this in both drivers and hardware (“G-Sync” for laptops) so it’s purely a business decision at this stage.
AND will get more Vega based
AND will get more Vega based graphics market share from its integrated APU graphics than any desktop discrete GPU market share figures. So integrated Vega and those Semi-custom discrete mobile Vega(Sort of) semi-custom Die SKUs that Intel’s Kaby Lake G SOCs are paired with on the EMIB/MCM. Vega Discrete Mobile for Laptops is still MIA currently from AMD. Raven Ridge/Integreted Vega will take more share from Intel and relatively less share from Nvidia with any larger gains in the Discrete GPU share not possible until AMD can get some of its own AMD Vega Discrete Mobile competition to market.
looking at the chart provided this must be only the discrete GPU figures as Intel is not Included with its Integrated graphics and maybe there should be more breakedowns on the Integrated Graphics market share from AMD, Intel, and Nvidia’s Gaming/Tegra related sales.
Vega in its integrated form will have the most market penetration for AMD in the shortest amount of time as more Raven Ridge Products have just been revealed. I think that maybe AMD needs to begin to try harder to get more gaming laptop OEMs to consider using the Desktop Raven Ridge Variants and the Ryzen/Raven Ridge 35 watt “GE” parts would be nice for mainstream gaming laptops if there will also be some Vega Discrete Mobile GPUs to pair up wth Raven Ridge GE as an option.
I’d like to see ASUS offer a 65 Watt Ryzen 5 2400G gaming laptop Option also as 65 Watts is not too difficult to manage in a laptop with a regular(Not Thin and Light) 15 inch form factor.
“Vega may not be the most powerful architecture on the planet, but it is selling along with previous generations of GPU.”
That’s not the Fault of Vega’s GPU Micro-Arch that’s AMD’s fault for not including more ROPs in its Vega 10 base die tapeout that was more shader heavy for compute/AI usage than it was ROP heavy for gaming usage.
That First Vega 10 base die tapeout with 4096 shader cores and only 64 available ROPs Max could never compete with Nvidia’s GP102 based GTX 1080Ti. Vega 64(Vega 10 base die based) only had enough ROPs to match the GTX 1080(64 ROPs) that is based in Nvidia’s GP104 base die tapeout and GP102 offers up to 96 ROPs of which Nvidia binned GP102 down to 88 ROPs for the GTX 1080Ti.
Vega the GPU micro-arch is actually very efficient if you look at Integrated Vega in Raven Ridge. The Vega 56(Vega 10 based die based) die bin actually has the exact same numbers of shader cores/TMUs as the GTX 1080Ti but Vega 56 only has 64 ROPs max available from that binned Vega 10 base die tapeout as Vega 10 falls short of avaiable ROPs compared to Nvidia’s GP102 gaming bin that offers up 88 out of 96 available ROPs in the 1080Ti SKU that has the highest pixel fill rate of all the current Pascal Based desktop discrete Gaming offerings.
Folks need to stop blaming Vega’s GPU micro-arch for AMD’s design decisions that where more to target the Professional Compute/AI markets with that Shader Heavy Vega 10 base die tapeout as that was the only tapeout that AMD could afford at the time. Maybe AMD could do a new Vega Base die Tapeout with more available ROPs to match Nvidia’s Higher Pixel Fill rates on the Flagship end of the GPU market but Mainstream/Mobile is where the majority of the discrete GPU market share is and not in the Flagship GPU market.
I guess AMD could always wait for enough Vega 20 die binns to begin showing up that do not make the grade to be used in the Radeon Instinct AI SKUs and maybe put together a Dual Vega 20 Die Flagship Gaming offering. AMD has done Dual Dies on one PCIe card offerings in the past when there where sufficient numbers of binned dies available.
Hurray! More long winded,
Hurray! More long winded, spam comments in the comment section! WOOOHOOOOO!!!!!
I have a new favourite.
I have a new favourite. Scroll down to the last comment if the link doesn't take you there directly.
10nm Potemkin Village, come
10nm Potemkin Village, come one come all to see our dandy work that’s really just Process Node Propaganda!
“Is Intel’s upcoming 10nm ‘launch’ real or a PR stunt?
Exclusive: We dug up the details that paint a clear picture”
Most processor node sizes
Most processor node sizes have been propaganda for the last 5-10 years, it’s not an Intel exclusive thing, node sizes only really made sense when the only thing that mattered was the gate pitch, there’s more to transistors than just that these days.
But it’s the way that Intel
But it’s the way that Intel Fibbs it up with the actual problems that they are having in a manner that is intended deceive the investors.
If the gate size is 10nm, or 7nm, then that’s what is used to measure the process node size and all that gate pitch has not much to do with the size/geomentry of the gate because gate pitch is where the density figure is mostly established.
Intel is having some serious yield issues and the time line for 10nm is making all the time line problems with 14nm look minor in comparsion.
It’s Intel’s nefarious ways that the article in question addresses and Intel is not far out in front in the process node battle anymore. Gate size has never had as much to do with density as gate pitch but that’s not as related to a transistor’s overall performance. The scalaing issues that were becoming an issue at 14nm are much worse on any nodes that are smaller that 14nm.
The article from S/A is not about process nodes and their measurements it’s about Intel trying cover up the problems that Intel is having and Intel’s trying to obfuscate the truth.
Those 10nm Intel products are so binned that their integrated GPUs can not even be used and laptop/device makers are being forced to participate in a 10nm dog and pony show!
I’m probably going to regret
I’m probably going to regret answering as undoubtedly you’ll reply with you usual vitriolic wall-o-text diatribe, but here goes nothing.
Firstly saying Intel is lying to investors is a serious accusation so do you have any proof other than your own biases?
Secondly FinFET gates have more than a single dimension (there three dimensional structures) so like i said measuring just the pitch of the gate is meaningless because the sizes of the source, drains, and gates all effect how a FinFET performs.
If you insist on using the gate pitch to define the node size then that’s fine but that would mean we should rename all the nodes, Intel 10nm would be 54nm, TSMC 10nm would be 64nm and GloFlo’s 7nm would be 56nm.
So as you can see your claims that Intel are being nefarious couldn’t be further from the truth, there all at it and if you could take of your rose tinted glasses for a moment you’d see that.
Like it or not engineering semiconductors at the scale that modern foundries are achieving is damn hard and a lot more complicated than your rather simplistic view that gate pitch should equal node size.
Gate size not gate
Gate size not gate pitch(Distance between gates) is what gives the most improvements. Intel has more density at 14nm but Intel is just using that for More dies/wafer and not adding to their graphics capabilities on their SOC’s that come with integrated graphics. Smaller gate size is what it’s all about for switching effencies, leakege improvments and other such things.
Getting more transistors crammed in is not going to be of much help if the CPU/SOC maker is wanting to not add any extra features(Fixing that DogFood Graphics) with the space saved not used for more circuits.
So maybe read what was written –>”If the gate size is 10nm, or 7nm, then that’s what is used to measure the process node size “<-- and did you even read the post that you replied to! Gate Size includes the 3 dimensional measurments of the actual matrial interface/field effect produced within that 3D space and nothing can exist in 2D space as there is no depth for matter to exist. Intel's Trying to be too agressive with their density gains at 10nm that is what's causing problems and Intel's now allowing the other makers to catch up and pass Intel in 10nm with 7nm on the way from TSMC and GF/others. But Let's call Intel out for not giving more of the space saved back to consumers in the form of more Graphics resources instead of trying to foist that Integrated Graphics on the entire OEM PC/Laptop market. You did not even bother to read the S/A article that was linked to so that's just meat shielding with those dead animals(dogs and ponies) you are hiding behind with regards to Intel's Nefarious ways that go back far in Intel's market history of dog and pony shows! Those Walls-O-Text sure have that single cell(enfeebled) of grey between your ears twitching(The entire sea of lipids there could flash fry the largerst frozen butterball in less than a New York Nanosecond) when your masters' nefarious ways are not very effecive in hiding the truth behind the Spin!
There’s no such thing as
There’s no such thing as “gate size” there’s pitch, length, height, width, etc, etc.
Gate size is an all encompassing term used by people who don’t know what their talking about, it would be like saying that person over there is a small size, it’s meaningless as it’s ill defined, you wouldn’t call a 30 stone man small just because he’s only 4ft high and you wouldn’t call a 7ft tall man small because he only has a 32 inch chest.
It’s good to see you proving a point with your vitriolic wall-o-text diatribe though, you really are the most repugnant moron I’ve ever come across.
More Q/A three card monte
More Q/A three card monte from the ChipLizard with Apache Pass the sodium pentothal to get at the real meat of this IP. And it appears that Micron Being Late is more because of the very similar issues with XPoint so Maybe Micron’s non Intel Licensees can sort that out by 2019 maybe.
“Intel dodges every question at Apache Pass/Xpoint launch
Actually they didn’t launch anything and did answer 2 of 11 questions”
if PCPer starts having to pay
if PCPer starts having to pay more for storage of their website, that guy is the reason why!
Ah Ha Ha ha! Storage costs
Ah Ha Ha ha! Storage costs are not even a factor with compression of text and really even uncompressed text is a non issue.
But your tears are so scrumdelicious and plentiful. Oh the pain the terrible metaphysical mental angst that you so very much suffer at having to see those Walls-O-Text.
Something in those vast Walls-O-Text has gotten that single enfeebled cell of grey floating in that vast sea of lipids a twitching as that Aneurysm inflates and pushes rivers of deep fryer hot lipids to begin to flow out of your ear holes and taking that one cell along for the ride with that cell still twitching away in its Triggered state.
Ah ha Ha Ha! Pffffft hu hu He Haw! Bah Haz haz Haz ho!
Precisely there to Trigger
Precisely there to Trigger Your Brain Aneurysm to burst, and it appears to be working!
Keep it up AMD.
Keep it up
Keep it up AMD.
Keep it up Nvidia.
Ryzen 3 with “integrated
Ryzen 3 with “integrated graphics” now in LG monitors…