A quick refresher and Dynamic Local Mode
AMD’s 2nd Generation Threadripper finally fills out
In general, the rollout of AMD's second-generation Ryzen Threadripper processors has been a bit unconventional. While the full lineup was announced back in August, there has been a staggered release period.
Later in August, we first got our hands on the Threadripper 2950X and 2990WX, the 16 and 32-core variants. Even though both of these parts were reviewed at the same time, the 2990WX was available first, with the 2950X coming a few weeks later.
Now more than two months later, we are taking a look at the 12-core Threadripper 2920X and the 24-core Threadripper 2970WX which were announced alongside the Threadipper parts that have already been shipping for quite a while now.
Will these new Threadripper processors be worth the wait?
| Threadripper 2990WX | Threadripper 2970WX | Threadripper 2950X | Threadripper 2920X | Core i9-7980XE | Core i9-9900K | |
|---|---|---|---|---|---|---|
| Architecture | Zen+ | Zen+ | Zen+ | Zen+ | Skylake-X | Coffee Lake Refresh |
| Process Tech | 12nm | 12nm | 12nm | 12nm | 14nm+ | 14nm++ |
| Cores/Threads | 32/64 | 24/48 | 16/32 | 12/24 | 18/36 | 8/16 |
| Base Clock | 3.0 GHz | 3.0 GHz | 3.5 GHz | 3.5 GHz | 2.6 GHz | 3.6 GHz |
| Boost Clock | 4.2 GHz | 4.2 GHz | 4.4 GHz | 4.3 GHz | 4.2 GHz | 5.0 GHz |
| L3 Cache | 64MB | 64MB | 32MB | 32 MB | 24.75MB | 16MB |
| Memory Support | DDR4-2933 (Quad-Channel) | DDR4-2933 (Quad-Channel) | DDR4-2933 (Quad-Channel) | DDR4-2933 (Quad-Channel) | DDR4-2666 (Quad-Channel) | DDR4-2666 (Dual-Channel) |
| PCIe Lanes | 64 | 64 | 64 | 64 | 44 | 16 |
| TDP | 250 Watts | 250 Watts | 180 Watts | 180 Watts | 165 Watts | 95 Watts |
| Socket | TR4 | TR4 | TR4 | TR4 | LGA-2066 | LGA1151 |
| Price (MSRP) | $1799 | $1299 | $899 | $649 | $1999 | $499 MSRP ($580 street) |
From a specifications perspective, these new Threadripper CPUs provide little in the way of surprise. Aside from the core-count difference, there is little to differentiate these parts from the existing higher core count SKUs, even down to the clock speeds and TDPs.
Interestingly enough, both the new 2920X and 2970WX provide the same relative value propositions with a price that is 27% lower, despite losing 25% of the processing cores compared to the 2950X and 2970WX respectively.
Dynamic Local Mode
One of the more exciting prospects of the launch of these last few second generation Threadripper CPUs today is the subsequent launch of AMD's Dynamic Local Mode.
Applying only to the WX-series Threadripper CPUs, Dynamic Local Mode is a piece of software, acting as a Windows service, which aims to reallocate cores based on a given dynamic workload.
To understand the potential advantages of Dynamic Local Mode, we must first take a quick refresher to look at how exactly the Threadripper X and WX-series CPUs are architected.
A diagram of the memory structure utilized in the Threadripper X-series processors
For the 12 and 16-core variants, the newer Threadripper CPU follow the same basic block level design we saw with the original Threadrippers. In this case, two Ryzen Pinnacle Ridge dies (equivalent to a Ryzen 7 2700X) are linked by Infinity Fabric to form the basic CPU design. Each die has access to a dual-channel memory controller, as well as 32 lanes of PCI Express.
A diagram of the memory structure utilized in the Threadripper WX-series processors
However, with the new 24 and 32-core Threadripper CPUs, this structure is adapted slightly. Instead of connecting each of the 4 Pinnacle Ridge CPU dies to a memory controller and PCI Express controller as we see in AMD's EPYC server chips, more of a hybrid approach is taken here.
Instead, Infinity Fabric links are used to connect every given Core Complex (CCX) to another, while maintaining two total memory controllers, and 64 lanes of PCI Express. This means, that for some cores to access the memory or PCI Express connectivity, they must first communicate over Infinity Fabric to another CCX, adding significant levels of latency.
Given Windows' lack of awareness of this unique memory structure, we found in our initial review of the Threadripper 2990WX that performance can be substantially impacted by this sort of memory access latency in some applications. Others have found that with Linux, which is substantially more adaptable and aware of non-standard memory configurations, the 2990WX performed much better than in Windows.
Dynamic Local Mode is AMD's attempt to fix this issue, without having access to fix it at its core, the Windows Scheduler level. Instead, Dynamic Local Mode works in the background to shuffle around CPU and memory heavy processes to threads that have direct memory access.
This feature can be enabled and disabled on the fly in the newest version of AMD's Ryzen Master desktop software.
Given the substantial changes that Dynamic Local Mode has to offer, we will be testing it on both the 2990WX and 2970WX alongside the stock configuration in all tests for this review.
| Review Terms and Disclosure All Information as of the Date of Publication |
|
|---|---|
| How product was obtained: | The product is on loan from AMD for the purpose of this review. |
| What happens to the product after review: | The product remains the property of AMD but is on extended loan for future testing and product comparisons. |
| Company involvement: | AMD had no control over the content of the review and was not consulted prior to publication. |
| PC Perspective Compensation: | Neither PC Perspective nor any of its staff were paid or compensated in any way by AMD for this review. |
| Advertising Disclosure: | AMD has purchased advertising at PC Perspective during the past twelve months. |
| Affiliate links: | This article contains affiliate links to online retailers. PC Perspective may receive compensation for purchases through those links. |
DLM seems hit or miss –
DLM seems hit or miss – perhaps some more tweaking is in order?
Did you try overclocking the
Did you try overclocking the 2920X at all?
Here’s an interesting point
Here’s an interesting point of comparison; my 4790k@4.7ghz will do 170cb in Single Thread Cinebench. AMD’s definitely starting to catch up in single thread. Ryzen 2 next year should be very interesting.
Ryzen-2, based on the Zen+
Ryzen-2, based on the Zen+ CPU micro-arch at 12nm(GlobalFoundries), is already released did you mean Ryzen-3 which will be based on the Zen-2 CPU micro-arch at 7nm(TSMC)?
Ryzen(Ryzen-1), based on the Zen CPU micro-arch at 14nm(GlobalFoundries licensed from Samsung 14nm process node) is the first generation of Ryzen Branding.
Then there is the Ryzen/Raven Ridge APU(desktop and mobile) SKUs that are all based on the first generation Zen CPU micro-arch at 14nm(GlobalFoundries licensed from Samsung 14nm process node) even though the Ryzen/Raven Ridge APUs all have 2000 series numbering they are NOT based on any Zen+ CPU micro-arch at 12nm(GlobalFoundries) process node.
So by the time the Zen-2 CPU micro-arch is released there will be AMD’s Ryzen-3 and Threadripper-3 Branding that will all be based on the Zen-2 CPU micro-arch at 7nm(TSMC). And who knows what CPU micro-arch AMD’s 2nd generation Raven Ridge APUs will be based on because all the 1st generation Raven Ridge APU SKUs have the Ryzen 2000 series branding but they are actually beased on first generation Zen and not Zen+ like the 2nd generation Ryzen-2/CPU-Only desktop SKUs and Threadripper-2 SKUs.
[Head explodes trying to make sense of AMD’s Ryzen and Threadripper branding along with the first generation Ryzen/Raven Ridge APU brandng that started at the 2000 series and not the 1000 series.]
yes. they’re referring to the
yes. they’re referring to the 2nd generation Zen architecture, not the first generation which comprises Ryzen 1000/2000 series processors.
and yes, it is confusing and it is calculated .
nothing has changed since the charlatans of the 1800s, peddling their low grade swill as “cure-all elixirs”, and then getting outta dodge before the town had time to wise up.
the marketing departments of today are no different. they just have to walk a finer line than they did 200 years ago.
I also blame Wikipedia and
I also blame Wikipedia and Wikichip for not including the fab process node and the CPU micro-arch on those large Tabular CPU “Features” listings that they create along with all that other information like core/thread counts, base and boost clocks, etc. But yes that bigger numbers are better marketing monkey business is what has the Raven Ridge first generation APUs starting with 2000 series numbering rather than 1000 series numbering and the APUs actially being based on Zen-1 at 14nm.
I guess that GF’s 12nm process had yet to be completely certified by the time that the first generation Raven Ridge DIE Tapeout was ready/scheduled for production ramp but it would not be hard for AMD to refresh Raven Ridge at 12nm and Raven Ridge probably had more tweaks to its Zen “Uncore” design what with the APUs not being based on any Zen/Zeppelin 8 core/2 CCX unit DIE tapeout. The Raven Ridge Memory Controller has to be a little different for handling both CPU and Integrated GPU memory requests. So that Raven Ridge CPU DIE Tapeout in a single CCX unit and Integrated Vega nCUs.
GF’s 12 process node also came with some transistor/gate Tweaks and in addition to using a smaller cell(7.5T) size of 10 fins at 48nm fin pitch to increase density a little over that Licened from Samsung 14nm node(9T library) at 12 fins at 48nm fin pitch that GF was using on Zen-1. But customers using GF 12nm node are still free to utilize the less dense libraries because the fin pitch is still the same at 48nm no matter the number of fins per cell utilized(9T or 7.5T).
Where GF really tweaked that 12nm node is on the reworking of the Transistors and Transistor difussion process to create a much improved gate geometry. So less resistence and less leakage and a higher switching frequency regardless of if the customer take advantage of the 7.5T or stays with the 9T cell libreries(1). And that’s because GF ketp the BEOL(Back End Of Line) metal layers layout the same on its 12nm node as was used on that Samsung/Licensed by GF 14nm node.
It sure looks like AMD’s remored Polaris 30 Based RX 590 at 12nm is going to have a little higher clocks if GF’s 12nm node is made use of. And I’d sure like to some updated Raven Ridge APUs at 12nm if AMD can not get any 7nm Raven Ridge offerings out before the 2nm half of 2019. And that 12nm GF process and the denser 7.5T cell library would be great for maybe some mobile APU options with better power usage metrics.
(1)
“VLSI 2018: GlobalFoundries 12nm Leading-Performance, 12LP”
https://fuse.wikichip.org/news/1497/vlsi-2018-globalfoundries-12nm-leading-performance-12lp/
This right here is why AMD
This right here is why AMD are always so far behind Intel and Nvidia, even when they have products that are at least as good as their competition. Their branding and marketing is confusing, if it exists at all. You don’t sell products by bamboozling your consumer base — they go with what they know.
This is why Intel have really screwed themselves over this generation. i3 = 2/4, i5 = 4/4, i7 = 4/8 was something that was consistent and understood. Even i3 = 4/4, i5 = 6/6, i7 = 6/12 was understood, and EVEN rebranding their HEDT stuff as i9 makes sense. But now taking HT from i7, making i9 consumer… it’s just nonsensical.
The press are not helping
The press are not helping matters decribing that Vega mobile Integrated Graphics as Vega 10(10 Vega nCUs) when there already is a AMD Big Discrete Base Die Tapeout called Vega 10(Similar to Nvidia’s GP100 big die tapeout).
So yes Nvidia Has better more unique naming for their various Base Die tapeouts like GP100, GP102, GP104, GP106, GP108 for exmple. So the Press needs to call the APU graphics with 10 Vega nCUs something like Integrated Vega 10. And the Big Discrete Die Vega 10 with 4096 shader cores, 256 TMUs,64 ROPs, and 64 nCUs total was called by the Vega 10 name first so the press was the one calling mobile Vega with 10 nCUs “Vega 10” also.
AMD made all of its large Vega GPU micro-arch based Pro and Consumer Dicrete GPU SKUs off of that same Big Vega 10 Base Die Tapeout from AMD’s Radeon Instinct MI25 and Radeon Pro WX 9100 SKUs to both Vega 56 and Vega 64 consumer gaming SKUs, and even the Prosumer Vega FE. Vega 56 and the lesser numbered Radeon Pro WX and Instinct MI compute/AI GPUs are derived also from Big Die Vega 10 binned dies with less nCUs active. And Die Binning is where most of the lower tiered consumer and professional GPUs are derived to try and make the most of even DIEs with some defective units.
Nvidia has for each generation 5 or more different Base Die tapeouts and that must cost at least a billion+ dollars to do while when Vega was first introduced AMD only had that one Big Base Die Taprout that was called “Vega 10”. So it’s easy to see that Nvidia outspends AMD by a large factor on available Base Die tapeouts.
Nvidia’s Die binning operation is way more comprehensive than AMD’s with Nvidia binning GTX 1060 variants from both the GP106 and GP104 Base Die Tapeouts. And Nvidia also beats AMD in having larger numbers of Base Die tapeouts with ever increasing amounts of available ROPs to beat AMD in the FPS metrics every generation. Look at GP102(96 ROPs available) which is mostly for Quadro production and yet Nvidia took GP102 and binned it at the lowest end for the consumer GTX 1080Ti with 88 out of 96 ROPs available on that GP102 based die tapeout enabled for the highet pixel fill rates of any gaming oriented GPU SKU.
The Tech Press needs to call AMD out on their naming confusion and look at how Nvidia’s more unique Naming for their various Base die tapeouts(GP100, GP102, etc.) actually avoids confusion. And that call out also concerns AMD’s lack of providing any reasonablely unique Base Die Tapeout Naming like Vega 10(The Big Die Tapeout) and letting the Press start calling that Integrated Vega 10(10 nCUs) “Vega 10” also. If AMD refuses to use clearer code naming then the press needs to get together and agree on some Nvidia like Base die Tapeout Naming that’s not as confusing.
But AMD needs Nvidia like naming for AMD’s various GPU base die tapeouts even if AMD can only afford to do one Big discrete Die tapeout a generation like Vega 10(4096 SPs/etc.).
It’s not helping things also with Both Nvidia and AMD and that Rebranding and creating different variants of the GTX 1060 and the RX580 with fewer SPs.
The FTC really needs to begin requiring more unique branding of CPUs and GPUs including regulation of that business of Rebranding for marketing obfuscation that’s only there to nefariously confuse consumers.