Thirdripper Shall Ride!
Hybrids Are Cool!
As Dr. Su responded when questioned about the future of Threadripper, “it’s very interesting, some of the things that circulate on the internet“. In an interview about the future of the child of a Ryzen and Epyc, she assured fans of the chip that there will indeed be a third incarnation, though she did not suggest a timeline.
It sits in a very interesting niche, requiring a much larger investment to build a Threadripper system than a Ryzen based on, but bringing some of that design to the table to allow it more flexibility than an Epyc. That makes it a great choice for content creators, BOINC or Folding@Home fanatics and other users who spend at least some time on tasks which the extra cores are advantageous. We will see over the coming months or year both how Intel will respond and how AMD can continue to make Threadripper a compelling product.
The chip maker's CEO Dr Lisa Su told press at Computex 2019 that despite suggestions that Zen 2 architecture-based Threadripper parts had been scrubbed from AMD's roadmap, the CPUs are still coming.
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It is kind of unclear what they are going to release for ThreadRipper. I suspect that it will have to wait for a while after Epyc 2 launch at a minimum, due to supply of cpu chiplets. Zen 2 launch will be limited to mid to high end desktop and server. Even with that, the server parts are going to take a lot of cpu die and the server market has precedence over the HEDT. Although, at only about ~70 square mm, they can make a lot of cpu chiplets.
I just started wondering if ThreadRipper will actually use the Epyc IO die. The Epyc IO die is probably quite expensive and possibly not great for latency. It is around 400 square nm, the size of a big GPU really. I had a weird thought though; perhaps there are some extra links in the desktop IO die to allow it to connect to a second IO die for HEDT and workstation parts. Zen 1 had 2 internal CCX connections, 4 IFOP links (only 3 used), two memory channels, and two x16 IFIS links. The IO die for Ryzen 3000 has at least 2 IFOP for the two chiplets, two memory controllers, and I assume 2 IFIS type 16x links (limited to 24 lanes for expansion). The Epyc IO die with 8 memory channels, 8 IFOP, and 8 IFIS seems like a bit of a waste to use in HEDT parts unless they have a lot of die with non-functional memory controllers or links. You are only using half of the available IO for ThreadRipper. If it can connect to another IO die, then that would allow up to 32 core parts, probably at a reasonable price. They could still offer cut down Epyc parts for a 48 and 64 core ThreadRipper, but those would be probably much more expensive.
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