Speaking Esperanto, 1,088 RISC-V Cores With A Pool Of Over 152MB Of SRAM

Source: Ars Technica Speaking Esperanto, 1,088 RISC-V Cores With A Pool Of Over 152MB Of SRAM

Energy Efficient Machine Learning

The RISC-V architecture doesn’t get much press lately but continues to undergo development and sees quite a bit of use by those who love an open source chip and instruction set that is optimized for low power applications.  Esperanto Technologies today revealed that a number of companies, including Samsung, have been testing out their new RISC-V based machine learning chip.

This SoC is fairly impressive, with 1,088 RISC-V cores than share over 152MB of on chip SRAM and is able to make use of flash memory and external DRAM.  That all adds up to a power efficient machine learning system which is also effective, if not well known.  Esperanto Technologies’ SoC also has another benefit, as all calculations are conducted on the SOC itself as opposed to offloading onto a GPU or coprocessor.

NVIDIA doesn’t have to worry quite yet, as not many companies have heard of this SoC let alone purchased any for testing.  Having Samsung test the 1,088 RISC-V cores SoC and give it great reviews is certainly a step in the right direction but Esperanto Technologies still has a way to go.

The chip designer, Esperanto Technologies, said Thursday Samsung SDS and other unnamed companies, which it only identified as "lead customers," are doing initial evaluations of the startup's ET-SoC-1 AI inference accelerator.

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About The Author

Jeremy Hellstrom

Call it K7M.com, AMDMB.com, or PC Perspective, Jeremy has been hanging out and then working with the gang here for years. Apart from the front page you might find him on the BOINC Forums or possibly the Fraggin' Frogs if he has the time.

1 Comment

  1. willmore

    I don’t know where you guys hang out, but I hear about RiscV almost daily.


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